LM3S6422 Datasheet, PDF (19/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Stellaris^® LM3S6422 Microcontroller
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 423
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 424
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 425
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 426
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 427
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 428
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 429
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 430
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 431
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 432
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 433
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 434
Synchronous Serial Interface (SSI) ............................................................................................ 435
Register 1: SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 448
Register 2: SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 450
Register 3: SSI Data (SSIDR), offset 0x008 ...................................................................................... 452
Register 4: SSI Status (SSISR), offset 0x00C ................................................................................... 453
Register 5: SSI Clock Prescale (SSICPSR), offset 0x010 .................................................................. 455
Register 6: SSI Interrupt Mask (SSIIM), offset 0x014 ......................................................................... 456
Register 7: SSI Raw Interrupt Status (SSIRIS), offset 0x018 .............................................................. 458
Register 8: SSI Masked Interrupt Status (SSIMIS), offset 0x01C ........................................................ 459
Register 9: SSI Interrupt Clear (SSIICR), offset 0x020 ....................................................................... 460
Register 10: SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0 ............................................. 461
Register 11: SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4 ............................................. 462
Register 12: SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8 ............................................. 463
Register 13: SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ............................................ 464
Register 14: SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0 ............................................. 465
Register 15: SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4 ............................................. 466
Register 16: SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8 ............................................. 467
Register 17: SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ............................................ 468
Register 18: SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0 ............................................... 469
Register 19: SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4 ............................................... 470
Register 20: SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8 ............................................... 471
Register 21: SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC ............................................... 472
Ethernet Controller ...................................................................................................................... 473
Register 1: Ethernet MAC Raw Interrupt Status/Acknowledge (MACRIS/MACIACK), offset 0x000 ....... 485
Register 2: Ethernet MAC Interrupt Mask (MACIM), offset 0x004 ....................................................... 488
Register 3: Ethernet MAC Receive Control (MACRCTL), offset 0x008 ................................................ 489
Register 4: Ethernet MAC Transmit Control (MACTCTL), offset 0x00C ............................................... 490
Register 5: Ethernet MAC Data (MACDATA), offset 0x010 ................................................................. 491
Register 6: Ethernet MAC Individual Address 0 (MACIA0), offset 0x014 ............................................. 493
Register 7: Ethernet MAC Individual Address 1 (MACIA1), offset 0x018 ............................................. 494
Register 8: Ethernet MAC Threshold (MACTHR), offset 0x01C .......................................................... 495
Register 9: Ethernet MAC Management Control (MACMCTL), offset 0x020 ........................................ 497
Register 10: Ethernet MAC Management Divider (MACMDV), offset 0x024 .......................................... 498
Register 11: Ethernet MAC Management Transmit Data (MACMTXD), offset 0x02C ............................. 499
Register 12: Ethernet MAC Management Receive Data (MACMRXD), offset 0x030 .............................. 500
Register 13: Ethernet MAC Number of Packets (MACNP), offset 0x034 ............................................... 501
June 18, 2012
19
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