LM3S6422 Datasheet, PDF (20/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Table of Contents
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Ethernet MAC Transmission Request (MACTR), offset 0x038 ........................................... 502
Ethernet PHY Management Register 0 – Control (MR0), address 0x00 ............................. 503
Ethernet PHY Management Register 1 – Status (MR1), address 0x01 .............................. 505
Ethernet PHY Management Register 2 – PHY Identifier 1 (MR2), address 0x02 ................. 507
Ethernet PHY Management Register 3 – PHY Identifier 2 (MR3), address 0x03 ................. 508
Ethernet PHY Management Register 4 – Auto-Negotiation Advertisement (MR4), address
0x04 ............................................................................................................................. 509
Ethernet PHY Management Register 5 – Auto-Negotiation Link Partner Base Page Ability
(MR5), address 0x05 ..................................................................................................... 511
Ethernet PHY Management Register 6 – Auto-Negotiation Expansion (MR6), address
0x06 ............................................................................................................................. 512
Ethernet PHY Management Register 16 – Vendor-Specific (MR16), address 0x10 ............. 513
Ethernet PHY Management Register 17 – Interrupt Control/Status (MR17), address
0x11 .............................................................................................................................. 515
Ethernet PHY Management Register 18 – Diagnostic (MR18), address 0x12 ..................... 517
Ethernet PHY Management Register 19 – Transceiver Control (MR19), address 0x13 ....... 518
Ethernet PHY Management Register 23 – LED Configuration (MR23), address 0x17 ......... 519
Ethernet PHY Management Register 24 –MDI/MDIX Control (MR24), address 0x18 .......... 520
Analog Comparators ................................................................................................................... 521
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x000 .................................. 526
Register 2: Analog Comparator Raw Interrupt Status (ACRIS), offset 0x004 ....................................... 527
Register 3: Analog Comparator Interrupt Enable (ACINTEN), offset 0x008 ......................................... 528
Register 4: Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x010 ....................... 529
Register 5: Analog Comparator Status 0 (ACSTAT0), offset 0x020 ..................................................... 530
Register 6: Analog Comparator Status 1 (ACSTAT1), offset 0x040 ..................................................... 530
Register 7: Analog Comparator Control 0 (ACCTL0), offset 0x024 ..................................................... 531
Register 8: Analog Comparator Control 1 (ACCTL1), offset 0x044 ..................................................... 531
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June 18, 2012
Texas Instruments-Production Data