LM3S6422 Datasheet, PDF (190/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

System Control
Register 10: Run-Mode Clock Configuration 2 (RCC2), offset 0x070
This register overrides the RCC equivalent register fields, as shown in Table 5-8, when the USERCC2
bit is set, allowing the extended capabilities of the RCC2 register to be used while also providing a
means to be backward-compatible to previous parts. Each RCC2 field that supersedes an RCC
field is located at the same LSB bit position; however, some RCC2 fields are larger than the
corresponding RCC field.
Table 5-8. RCC2 Fields that Override RCC fields
RCC2 Field...
SYSDIV2, bits[28:23]
PWRDN2, bit[13]
BYPASS2, bit[11]
OSCSRC2, bits[6:4]
Overrides RCC Field
SYSDIV, bits[26:23]
PWRDN, bit[13]
BYPASS, bit[11]
OSCSRC, bits[5:4]
Run-Mode Clock Configuration 2 (RCC2)
Base 0x400F.E000
Offset 0x070
Type R/W, reset 0x0780.2810
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
USERCC2
reserved
SYSDIV2
reserved
Type R/W
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
PWRDN2 reserved BYPASS2
reserved
OSCSRC2
reserved
Type RO
RO
R/W
RO
R/W
RO
RO
RO
RO
R/W
R/W
R/W
RO
RO
RO
RO
Reset
0
0
1
0
1
0
0
0
0
0
0
1
0
0
0
0
Bit/Field
31
30:29
28:23
22:14
13
12
Name
USERCC2
reserved
SYSDIV2
reserved
PWRDN2
reserved
Type
R/W
RO
R/W
RO
R/W
RO
Reset
0
0x0
0x0F
0x0
1
0
Description
Use RCC2
When set, overrides the RCC register fields.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
System Clock Divisor
Specifies which divisor is used to generate the system clock from either
the PLL output or the oscillator source (depending on how the BYPASS2
bit is configured). SYSDIV2 is used for the divisor when both the
USESYSDIV bit in the RCC register and the USERCC2 bit in this register
are set. See Table 5-6 on page 172 for programming guidelines.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Power-Down PLL
When set, powers down the PLL.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
190
June 18, 2012
Texas Instruments-Production Data