LM3S6422 Datasheet, PDF (532/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Analog Comparators
Bit/Field
6:5
4
3:2
1
0
Name
TSEN
ISLVAL
ISEN
CINV
reserved
Type
R/W
R/W
R/W
R/W
RO
Reset
0x0
Description
Trigger Sense
The TSEN field specifies the sense of the comparator output that
generates an ADC event. The sense conditioning is as follows:
Value Function
0x0 Level sense, see TSLVAL
0x1 Falling edge
0x2 Rising edge
0x3 Either edge
0
Interrupt Sense Level Value
The ISLVAL bit specifies the sense value of the input that generates
an interrupt if in Level Sense mode. If 0, an interrupt is generated if the
comparator output is Low. Otherwise, an interrupt is generated if the
comparator output is High.
0x0
Interrupt Sense
The ISEN field specifies the sense of the comparator output that
generates an interrupt. The sense conditioning is as follows:
Value Function
0x0 Level sense, see ISLVAL
0x1 Falling edge
0x2 Rising edge
0x3 Either edge
0
Comparator Output Invert
The CINV bit conditionally inverts the output of the comparator. If 0, the
output of the comparator is unchanged. If 1, the output of the comparator
is inverted prior to being processed by hardware.
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
532
June 18, 2012
Texas Instruments-Production Data