LM3S6422 Datasheet, PDF (17/609 Pages) Texas Instruments – Stellaris® LM3S6422 Microcontroller

Stellaris^® LM3S6422 Microcontroller
Register 19:
Register 20:
Register 21:
Register 22:
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Register 24:
Register 25:
Register 26:
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Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 282
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 283
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 285
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 286
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 287
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 288
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 289
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 290
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 291
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 292
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 293
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 294
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 295
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 296
General-Purpose Timers ............................................................................................................. 297
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 309
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 310
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 312
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 314
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 317
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 319
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 320
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 321
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 323
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 324
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 325
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 326
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 327
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 328
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 329
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 330
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 331
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 332
Watchdog Timer ........................................................................................................................... 333
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 337
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 338
Register 3: Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 339
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 340
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 341
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 342
Register 7: Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 343
Register 8: Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 344
Register 9: Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 345
Register 10: Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 346
Register 11: Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 347
Register 12: Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 348
Register 13: Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 349
Register 14: Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 350
June 18, 2012
17
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