|
LM3S611-IQN50-C2T Datasheet, PDF (532/574 Pages) Texas Instruments – Stellaris® LM3S611 Microcontroller | |||
|
◁ |
Electrical Characteristics
NRND: Not recommended for new designs.
18.1.6
18.2
18.2.1
Table 18-5. Detailed Power Specifications
Parameter Parameter Name
Conditions
Run mode 1 (Flash loop) LDO = 2.50 V
Code = while(1){} executed out of Flash
Peripherals = All clock-gated ON
System Clock = 50 MHz (with PLL)
Run mode 2 (Flash loop) LDO = 2.50 V
Code = while(1){} executed out of Flash
Peripherals = All clock-gated OFF
IDD_RUN
Run mode 1 (SRAM
loop)
System Clock = 50 MHz (with PLL)
LDO = 2.50 V
Code = while(1){} executed in SRAM
Peripherals = All clock-gated ON
System Clock = 50 MHz (with PLL)
Run mode 2 (SRAM
loop)
LDO = 2.50 V
Code = while(1){} executed in SRAM
Peripherals = All clock-gated OFF
System Clock = 50 MHz (with PLL)
IDD_SLEEP Sleep mode
LDO = 2.50 V
Peripherals = All clock-gated OFF
System Clock = 50 MHz (with PLL)
IDD_DEEPSLEEP Deep-Sleep mode
LDO = 2.25 V
Peripherals = All OFF
System Clock = MOSC/16
Nom Max Unit
95
110
mA
60
75
mA
85
95
mA
50
60
mA
19
22
mA
950 1150
μA
Flash Memory Characteristics
Table 18-6. Flash Memory Characteristics
Parameter Parameter Name
Min
PECYC
Number of guaranteed program/erase cycles
before failurea
10,000
TRET
Data retention at average operating temperature
10
of 85ËC (industrial) or 105ËC (extended)
TPROG
Word program time
20
TERASE
Page erase time
20
TME
Mass erase time
-
a. A program/erase cycle is defined as switching the bits from 1-> 0 -> 1.
AC Characteristics
Nom
Max
100,000
-
-
-
-
-
-
-
-
250
Unit
cycles
years
µs
ms
ms
Load Conditions
Unless otherwise specified, the following conditions are true for all timing measurements. Timing
measurements are for 4-mA drive strength.
532
June 18, 2012
Texas Instruments-Production Data
|
▷ |