LM3S611-IQN50-C2T Datasheet, PDF (280/574 Pages) Texas Instruments – Stellaris® LM3S611 Microcontroller

General-Purpose Timers
NRND: Not recommended for new designs.
Table 8-4. Timers Register Map
Offset Name
Type
0x000 GPTMCFG
0x004 GPTMTAMR
0x008 GPTMTBMR
0x00C GPTMCTL
0x018 GPTMIMR
0x01C GPTMRIS
0x020 GPTMMIS
0x024 GPTMICR
0x028 GPTMTAILR
0x02C GPTMTBILR
0x030 GPTMTAMATCHR
0x034 GPTMTBMATCHR
0x038 GPTMTAPR
0x03C GPTMTBPR
0x040 GPTMTAPMR
0x044 GPTMTBPMR
0x048 GPTMTAR
0x04C GPTMTBR
R/W
R/W
R/W
R/W
R/W
RO
RO
W1C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
Reset
Description
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0xFFFF.FFFF
0x0000.FFFF
0xFFFF.FFFF
0x0000.FFFF
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0xFFFF.FFFF
0x0000.FFFF
GPTM Configuration
GPTM TimerA Mode
GPTM TimerB Mode
GPTM Control
GPTM Interrupt Mask
GPTM Raw Interrupt Status
GPTM Masked Interrupt Status
GPTM Interrupt Clear
GPTM TimerA Interval Load
GPTM TimerB Interval Load
GPTM TimerA Match
GPTM TimerB Match
GPTM TimerA Prescale
GPTM TimerB Prescale
GPTM TimerA Prescale Match
GPTM TimerB Prescale Match
GPTM TimerA
GPTM TimerB
See
page
281
282
284
286
289
291
292
293
295
296
297
298
299
300
301
302
303
304
8.6 Register Descriptions
The remainder of this section lists and describes the GPTM registers, in numerical order by address
offset.
280
June 18, 2012
Texas Instruments-Production Data