DRV3201-Q1_16 Datasheet, PDF (5/60 Pages) Texas Instruments – DRV3201-Q1 3 Phase Motor Driver-IC for Automotive Safety Applications

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DRV3201-Q1
SLVSBD6D – MAY 2012 – REVISED AUGUST 2015
Pin Functions
PIN
TYPE ⁽¹⁾
NO.
NAME
DESCRIPTION
1
VSH
HVI_A Sense high-side, sensing VS connection of the external power MOSFETs for VDS monitoring.
2
SLS3
PWR Source low-side 3, connected to external power MOSFET for gate discharge and VDS monitoring.
3
GLS3
PWR Gate low-side 3, connected to gate of external power MOSFET.
4
SHS3
PWR Source high-side 3, connected to external power MOSFET for gate discharge and VDS monitoring.
5
GHS3
PWR Gate high-side 3, connected to gate of external power MOSFET.
6
PGND
GND
Sense low-side (ground), sensing ground connection of the external power MOSFETs for phase
comparators.
7
SLS2
PWR Source low-side 2, connected to external power MOSFET for gate discharge and VDS monitoring.
8
GLS2
PWR Gate low-side 2, connected to gate of external power MOSFET.
9
SHS2
PWR Source high-side 2, connected to external power MOSFET gate discharge and VDS monitoring.
10
GHS2
PWR Gate high-side 2, connected to gate of external power MOSFET.
11
GNDA
GND Analog ground
12
SCTH
HVI_A Short circuit threshold, reference input voltage for VDS monitoring.
13
SLS1
PWR Source low-side 1, connected to external power MOSFET for gate discharge and VDS monitoring.
14
GLS1
PWR Gate low-side 1, connected to gate of external power MOSFET.
15
SHS1
PWR
Source high-side 1, connected to external power MOS transistor for gate discharge and VDS
monitoring.
16
GHS1
PWR Gate high-side 1, connected to gate of external power MOS transistor.
17
PH1C
LVO_D Phase comparator output1
18
PH2C
LVO_D Phase comparator output2
19
PH3C
LVO_D Phase comparator output3
20
GNDA
GND Analog ground
21
DRVOFF HVI_D Driver OFF (high active), secondary bridge driver disable
22
SCLK
HVI_D SPI clock
23
GNDL
GND Logic ground
24
NCS
HVI_D SPI chip select
25
SDI
HVI_D SPI data input
26
SDO
LVO_D SPI data output
27
GNDA
GND Analog ground
28
VS
Supply Power supply voltage
29
BOOST
Supply Boost output voltage, used as supply for the gate-drivers.
30
SW
PWR Boost converter switching node connected to external coil and external diode.
31
GNDLS_B
GND
Boost GND to set current limit. Boost switching current goes through this pin through exterior
resistor to GND.
32
NC
NC
NC pin, connected to GND during normal application.
33
NC
NC
NC pin, connected to GND during normal application.
34
B_EN
HVI_D Boost enable. Enable boost operation or disable during, for example, sensitive measurement.
35
CSM
HVI_D Configurable safety mode (high active), defines the level of safety.
36
EN
HVI_D Enable (high active) of the device
37
RSTN
HVI_D Reset (low active)
38
ERR
LVO_D Error (low active). Error pin to indicate detected error.
39
GNDA
GND Ground analog
40
VCC5
LVO_A
VCC5 regulator, for internal use only. Recommended external decoupling capacitance: 4.7 nF.
External load < 100 µA
41
TEST
HVI_A TEST mode input, connected to GND during normal application.
(1) Description of pin type: GND = Ground, HVI_A = High-Voltage Input Analog, HVI_D = High-Voltage Input Digital, LVI_A = Low-Voltage
Input Analog, LVO_A = Low-Voltage Output Analog, LVO_D = Low-Voltage Output Digital, NC = NoConnect, PWR = Power Output,
Supply = Supply Input.
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