DRV3201-Q1_16 Datasheet, PDF (19/60 Pages) Texas Instruments – DRV3201-Q1 3 Phase Motor Driver-IC for Automotive Safety Applications

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DRV3201-Q1
SLVSBD6D – MAY 2012 – REVISED AUGUST 2015
Feature Description (continued)
To verify the proper operation of the VDS comparators during normal operation, either the scale factor can be
lowered through SPI, or the SCTH voltage can be externally lowered. This sets a lower VDS threshold
(depending mostly on the random comparator offset < ± 250 mV) which causes the comparators to toggle at
relative low current through the external power FETs (during normal operation without overcurrent). This is
shown in Figure 5. During this verification, the error-handling of the VDS errors can be disabled as described in
the Configurable Safety Mode section (configuration register 1 (CFG1), bits 3:4), such that the VDS errors are
flagged in the SPI status register 0 (STAT0) and at the ERR pin only. The SCTH pin is a high-impedance input to
a MOS gate with internal ESD protection to ground. There is no reverse pullup path present to any supply (fail-
safe ESD structure).
ILSx
SCTH × Scale
I_Phase
SCTH × Scale
Low-Side VDSx Comp signal
latched in SPI register
NOTE: Low-Side Given as Example, Principle Also Applies to High-Side.
Figure 5. Checking VDS Comparators During Normal Operation
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