DRV3201-Q1_16 Datasheet, PDF (37/60 Pages) Texas Instruments – DRV3201-Q1 3 Phase Motor Driver-IC for Automotive Safety Applications

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Bits
R/W
7
RW
6
RW
5
RW
4
RW
3
RW
2
RW
1
RW
0
RW
Bits
R/W
7:0
RO
Bits R/W
7:0
RO
Reset
1’h0
1’h0
1’h0
1’h0
1’h0
1’h0
1’h0
1’h0
DRV3201-Q1
SLVSBD6D – MAY 2012 – REVISED AUGUST 2015
Table 21. HS/LS Count Control (RB1)space(Addr. 0x24)
Definition
Clear edge counter
This bit has priority over 6 down to 0
Start/stop counter
0: Counter stopped
1: Counter running
Enable LS2 edge count
Enable LS1 edge count
Enable LS0 edge count
Enable HS2 edge count
Enable HS1 edge count
Enable HS0 edge count
Reset
8’h0
Table 22. HS/LS Count (RB2)space(Addr. 0x25)
Definition
HS/LS edge count
Counter stops counting at 0xFF
Reset
8’h0
Table 23. Ultima Ratio Command (UR)space(Addr. 0x30)
Definition
Ultima ratio command
See specification for command sequence
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