DRV3201-Q1_16 Datasheet, PDF (21/60 Pages) Texas Instruments – DRV3201-Q1 3 Phase Motor Driver-IC for Automotive Safety Applications

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DRV3201-Q1
SLVSBD6D – MAY 2012 – REVISED AUGUST 2015
Feature Description (continued)
7.3.5.1.3 Boost Undervoltage Error
If the boost converter output voltage is below the undervoltage threshold level V_VBOOST,UV (11 V to 11.9 V) for
t_BCSD (5 µs–6 µs), the boost undervoltage flag is set accordingly in SPI status register 1 (STAT1). Depending on
the configured safety mode (see Configurable Safety Mode), all gate-driver outputs are pulled low, and the ERR
pin is pulled low.
7.3.5.1.4 VS Undervoltage Shutdown
If the VS voltage drops below the undervoltage threshold level V_VS,UV (4.5 V to 4.75 V) for t_VS,SHD (5 µs to 6 µs),
the VS undervoltage flag is set in SPI status register 1 (STAT1), the gate-driver outputs are pulled low, and the
ERR pin is pulled low. This happens regardless of the configured safety mode (see Configurable Safety Mode).
The SPI interface works down to 3 V. Below 3 V on VS, internal reset occurs.
7.3.5.1.5 VS Overvoltage Error
If the VS voltage exceeds the overvoltage threshold level V_VS,OV (29.3 V to 30.7 V) for t_VS,SHD (5 µs to 6 µs), the
VS overvoltage flag is set in SPI status register 1 (STAT1). Depending on the configured safety mode (see
Configurable Safety Mode), all gate-driver outputs are pulled low, and the ERR pin is pulled low.
7.3.5.1.6 VS Comparator Check
The VS undervoltage and overvoltage comparators can be checked by using the loss of clock (LOC) test/VS
comparator bit in configuration register 0 (CFG0). As long as this bit is set the comparators toggle and flag the
undervoltage and the overvoltage at the same time. The error handling is active, so the bridges shut down and
the ERR pin is pulled low. To reset the flags the LOC test /VS comparator bit needs to be reset and then the
flags need to be read through SPI. After this, the ERR pin goes up again. This self-check is combined with the
loss of clock self-test (see Loss of Clock).
7.3.5.1.7 Overtemperature Warning and Shutdown
The thermal overload detection and protection of the device is based on five temperature sensors and two
thresholds T_msd1 (thermal warning) and T_msd2 (thermal global reset):
State
Global Reset
Local Shutdown
Normal Operation
Tmsd0
Tmsd1
Tmsd2
T(°C)
Figure 7. Thermal Shutdown
Normal operation of the device:
• Gate-drivers and boost converter are fully operational.
Thermal warning – overtemperature warning flag is set to 1:
• Thermal warning, stored in overtemperature warning bit in status register 0 (STAT0). This bit is reset after a
read out of this register by the MCU.
Global reset - device in shutdown:
• An internal reset is generated.
• The boost converter is stopped.
• However, the temperature monitor block monitors the temperature and does not release the reset until the
temperature drops below T_msd0.
• Thermal hysteresis avoids any oscillation between shutdown and restart.
• The overtemperature shutdown is filtered with t_TSD (no unwanted shutdown by noise).
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