AM1707_1008 Datasheet, PDF (75/199 Pages) Texas Instruments – ARM Microprocessor

AM1707
www.ti.com
SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010
6.12 External Memory Interface B (EMIFB)
The following EMIFB Functional Block Diagram illustrates a high-level view of the EMIFB and its
connections within the device. Multiple requesters have access to EMIFB through a switched central
resource (indicated as crossbar in the figure). The EMIFB implements a split transaction internal bus,
allowing concurrence between reads and writes from the various requesters.
EMIFB
CPU
EDMA
Master
Peripherals
(USB, UHPI...)
Crossbar
Registers
EMB_CS
EMB_CAS
Cmd/Write
FIFO
EMB_RAS
EMB_WE
EMB_CLK
Read
FIFO
EMB_SDCKE
EMB_BA[1:0]
EMB_A[x:0]
EMB_D[x:0]
EMB_WE_DQM[x:0]
SDRAM
Interface
Figure 6-20. EMIFB Functional Block Diagram
EMIFB supports a 3.3V LVCMOS Interface.
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
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