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AM1707_1008 Datasheet, PDF (71/199 Pages) Texas Instruments – ARM Microprocessor
AM1707
www.ti.com
SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010
Table 6-23. EMIFA Asynchronous Memory Switching Characteristics (1) (2) (3) (continued)
No.
PARAMETER
19 th(EMWEH-
EMDQMIV)
Output hold time, EMA_WE high to
EMA_BA[1:0] invalid
20 tsu(EMBAV-
EMWEL)
Output setup time, EMA_BA[1:0] valid to
EMA_WE low
21
th(EMWEH-EMBAIV)
Output hold time, EMA_WE high to
EMA_BA[1:0] invalid
22
tsu(EMAV-EMWEL)
Output setup time, EMA_A[13:0] valid to
EMA_WE low
23
th(EMWEH-EMAIV)
Output hold time, EMA_WE high to
EMA_A[13:0] invalid
24 tw(EMWEL)
EMA_WE active low width (EW = 0)
EMA_WE active low width (EW = 1)
25 td(EMWAITH-
EMWEH)
Delay time from EMA_WAIT deasserted to
EMA_WE high
26
tsu(EMDV-EMWEL)
Output setup time, EMA_D[15:0] valid to
EMA_WE low
27
th(EMWEH-EMDIV)
Output hold time, EMA_WE high to
EMA_D[15:0] invalid
MIN
(WH)*E-3
NOM
(WH)*E
MAX
UNIT
(WH)*E+3 ns
(WS)*E-3
(WS)*E
(WS)*E+3 ns
(WH)*E-3
(WH)*E
(WH)*E+3 ns
(WS)*E-3
(WS)*E
(WS)*E+3 ns
(WH)*E-3
(WH)*E
(WH)*E+3 ns
(WST)*E-3
(WST)*E
(WST)*E+3 ns
(WST+(EWC*16))
*E-3
(WST+(EWC*16))*E
(WST+(EWC*16)
)*E+3
ns
3E-3
4E
4E+3 ns
(WS)*E-3
(WS)*E
(WS)*E+3 ns
(WH)*E-3
(WH)*E
(WH)*E+3 ns
EMA_CLK
EMA_CS[0]
EMA_WE_DQM[1:0]
EMA_BA[1:0]
EMA_A[12:0]
EMA_D[15:0]
EMA_RAS
EMA_CAS
EMA_WE
BASIC SDRAM
WRITE OPERATION
1
22
3
4
5
6
7
8
7
8
9
10
11
12
13
15
16
Figure 6-14. EMIFA Basic SDRAM Write Operation
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
71
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