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AM1707_1008 Datasheet, PDF (32/199 Pages) Texas Instruments – ARM Microprocessor
AM1707
SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010
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3.6.19 Liquid Crystal Display Controller(LCD)
Table 3-21. Liquid Crystal Display Controller (LCD) Terminal Functions
SIGNAL NAME
PIN No. TYPE(1) PULL(2)
ZKB
MUXED
DESCRIPTION
EMA_D[15]/UHPI_HD[15]/LCD_D [15]/GP0[15]
M16
I/O
IPD
EMA_D[14]/UHPI_HD[14]/LCD_D[14]/GP0[14]
N14
I/O
IPD
EMA_D[13]/UHPI_HD[13]/LCD_D[13]/GP0[13]
N16
I/O
IPD
EMA_D[12]/UHPI_HD[12]/LCD_D[12]/GP0[12]
EMA_D[11]/UHPI_HD[11]/LCD_D[11 ]/GP0[11]
P14
I/O
P16
I/O
IPD EMIFA, UHPI,
IPD GPIO
EMA_D[10]/UHPI_HD[10]/LCD_D[10]/GP0[10]
EMA_D[9]/UHPI_HD[9]/LCD_D[9]/GP0[9]
R14
I/O
IPD
T14
I/O
IPD
LCD data bus.
EMA_D[8]/UHPI_HD[8]/LCD_D[8]/GP0[8]
N12
I/O
IPD
EMA_A[0]/LCD_D[7]/GP1[0]
EMA_A[3]/LCD_D[6]/GP1[3]
T9
I/O
N9
I/O
IPD
EMIFA, GPIO
IPD
EMA_BA[1]/LCD_D[5]/UHPI_HHWIL/GP1[13]
P8
I/O
IPU
EMIFA, UHPI,
GPIO
EMA_BA[0]/LCD_D[4]/GP1[14]
R8
I/O
IPU
EMA_A[4]/LCD_D[3]/GP1[4]
T10
I/O
IPD
EMA_A[5]/LCD_D[2]/GP1[5]
R10
I/O
IPD
LCD data bus.
EMA_A[6]/LCD_D[1]/GP1[6]
P10
I/O
IPD
EMA_A[7]/LCD_D[0]/GP1[7]
EMA_A[8]/LCD_PCLK/GP1[8]
N10
I/O
T11
O
IPD
IPU EMIFA, GPIO
LCD pixel clock.
EMA_A[9]/LCD_HSYNC/GP1[9]
R11
O
IPU
LCD horizontal sync.
EMA_A[10]/LCD_VSYNC/GP1[10]
N8
O
IPU
LCD vertical sync.
EMA_A[11]/ LCD_AC_ENB_CS /GP1[11]
P11
O
IPU
LCD AC bias enable
chip select.
EMA_A[12]/LCD_MCLK/GP1[12]
N11
O
IPU
LCD memory clock.
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
3.6.20 Reserved and No Connect
Table 3-22. Reserved and No Connect Terminal Functions
SIGNAL NAME
RSV1
RSV2
NC
NC
(1) PWR = Supply voltage.
PIN No.
ZKB
F7
B1
F3
H4
TYPE (1)
PWR
PWR
-
-
DESCRIPTION
Reserved. (Leave unconnected, do not connect to power or ground.)
Reserved. For proper device operation, this pin must be tied directly to
CVDD.
No Connect (leave unconnected)
No Connect (leave unconnected)
32
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