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AM1707_1008 Datasheet, PDF (128/199 Pages) Texas Instruments – ARM Microprocessor
AM1707
SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010
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Table 6-70. ECAPx Configuration Registers
ECAP0
BYTE ADDRESS
0x01F0 6000
0x01F0 6004
0x01F0 6008
0x01F0 600C
0x01F0 6010
0x01F0 6014
0x01F0 6028
0x01F0 602A
0x01F0 602C
0x01F0 602E
0x01F0 6030
0x01F0 6032
0x01F0 605C
ECAP1
BYTE ADDRESS
0x01F0 7000
0x01F0 7004
0x01F0 7008
0x01F0 700C
0x01F0 7010
0x01F0 7014
0x01F0 7028
0x01F0 702A
0x01F0 702C
0x01F0 702E
0x01F0 7030
0x01F0 7032
0x01F0 705C
ECAP2
BYTE ADDRESS
0x01F0 8000
0x01F0 8004
0x01F0 8008
0x01F0 800C
0x01F0 8010
0x01F0 8014
0x01F0 8028
0x01F0 802A
0x01F0 802C
0x01F0 802E
0x01F0 8030
0x01F0 8032
0x01F0 805C
ACRONYM
TSCTR
CTRPHS
CAP1
CAP2
CAP3
CAP4
ECCTL1
ECCTL2
ECEINT
ECFLG
ECCLR
ECFRC
REVID
REGISTER DESCRIPTION
Time-Stamp Counter
Counter Phase Offset Value Register
Capture 1 Register
Capture 2 Register
Capture 3 Register
Capture 4 Register
Capture Control Register 1
Capture Control Register 2
Capture Interrupt Enable Register
Capture Interrupt Flag Register
Capture Interrupt Clear Register
Capture Interrupt Force Register
Revision ID
Table 6-71 shows the eCAP timing requirement and Table 6-72 shows the eCAP switching characteristics.
tw(CAP)
Table 6-71. Enhanced Capture (eCAP) Timing Requirement
PARAMETER
Capture input pulse width
TEST CONDITIONS
Asynchronous
Synchronous
MIN
2tc(SCO)
2tc(SCO)
MAX
UNIT
cycles
cycles
tw(APWM)
Table 6-72. eCAP Switching Characteristics
PARAMETER
MIN
Pulse duration, APWMx output high/low
20
MAX
UNIT
ns
128 Peripheral Information and Electrical Specifications
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