TCM4400E Datasheet, PDF (6/64 Pages) Texas Instruments – GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT

TCM4400E
GSM/DCS BASEBAND AND VOICE A/D
AND D/A RF INTERFACE CIRCUIT
SLWS082A – JULY 1999 – REVISED MARCH 2000
Terminal Functions (Continued)
TERMINAL
NAME
NO.
I/O
QFP BGA
DESCRIPTION
DVDD4
DVSS1
21 J2
79 B3
Digital positive power supply (voiceband codec and serial interface)
Digital negative power supply (baseband and timing serial interfaces)
DVSS2
DVSS3
DVSS4
EARN
65 A8
Digital negative power supply (baseband CODEC)
49 F10
Digital negative power supply (auxiliary RF functions)
22 K2
Digital negative power supply (voiceband codec and serial interface)
33 J6 O Earphone amplifier output (–) (analog)
EARP
32 K6 O Earphone amplifier output (+) (analog)
GNDA1 25 K3
Analog signal ground for the microphone amplifier and auxiliary input
GNDA2 35 K7
Signal return (ground) for AUXO output
IBIAS
9 E1 I/O Internal bias reference current adjust. IBIAS adjusts the reference current with an external resistor (analog).
MCLK
70 B6 I Master system clock input (13 MHz)
MICBIAS 26 J4
I Microphone bias supply output. MICBIAS is also used to decouple bias supply with an external capacitor
(analog).
MICIP
27 K4 I Positive microphone amplifier input (analog)
MICIN
28 H4 I Negative microphone amplifier input (analog)
PWRDN 23 J3 I Power-down mode control input (digital), active high
RESET 12 F1 I Device global hardware reset (digital), active low
SSCLK 20 J1 O DAI external 104 kHz clock output (digital)
SSDR
19 H2 I DAI data transfer input. SSDR connects to GSM-SS TDAI (digital/pullup).
SSDX
18 H1 O DAI data transfer output SSDX connects to GSM-SS RDAI (digital).
SSRST 17 G3 I DAI reset input (digital/pullup)
TCK
64 C8 I Scan test clock (digital/pulldown)
TDI
63 B8 I Scan path input (for testing purposes) (digital/pullup)
TDO
62 A9 I Scan path output (for testing purposes) (digital/3-state)
TEST1
69 A6 I/O Test I/O (digital/3-state & pullup)
TEST2
68 C7 I/O Test I/O (digital/3-state & pullup)
TEST3
67 A7 O Test output (digital)
TMS
61 B9 I JTAG test mode select (digital/pullup)
TRST
24 H3 I JTAG serial interface & boundary scan register reset (digital/pullup), active low.
UCLK
78 A3 I MCU interface clock input (digital)
UDR
77 C4 I MCU interface data transfer input (digital)
UDX
76 B4 O MCU interface data transfer output (digital/3-state)
USEL
75 A4 I MCU serial interface select (digital)
VCLK
16 G2 O Voiceband serial interface clock output (digital/3-state)
VDR
15 G1 I Voiceband serial interface receive data input (digital)
VDX
14 F3 O Voiceband serial interface transmit data output (digital/3-state)
VFS
13 F2 O Voiceband serial interface transmit frame synchronization output (digital/3-state)
VGAP
10 E2 I/O Bandgap reference voltage. VGAP decouples with an external capacitor (analog)
VMID
50 F9 O Baseband uplink midrail voltage output. VMID serves as a reference common-mode voltage for a RF device
when directly dc coupled (analog)
VREF
8 D3 I/O Reference voltage VREF decouples with an external capacitor (analog).
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