TCM4400E Datasheet, PDF (55/64 Pages) Texas Instruments – GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT

TCM4400E
GSM/DCS BASEBAND AND VOICE A/D
AND D/A RF INTERFACE CIRCUIT
SLWS082A – JULY 1999 – REVISED MARCH 2000
PRINCIPLES OF OPERATION
auxiliary functions control register 1
The bit values in the auxiliary functions control register 1 resets the APC generator or the AFC modulator, selects
the A/D counter input, and selects the AFC sampling frequency. This is shown in Table 24.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _AFCPN
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ R/W
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 0
AFCPD
R/W
0
Table 24. AUX Functions Control Register 1
UXCTL1: AUXILIARY FUNCTIONS CONTROL REGISTER
ADCPN
ADCPD AFCCK1 AFCCK0 ADCCH2 ADCCH1
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
ADCCH0
R/W
0
ARST
R/W
0
ADDRESS: 13 R/W
0 1 1 0 1 1/0
<–ACCESS TYPE
<–VALUE AT RESET
ARST:
Reset of the digital parts for the auxiliary function (APC generator and AFC modulator).
This is not a toggle bit and has to be set to 0 to remove the reset condition.
ADCCH (0–2): Selection of the input of the A/D converter; see Table 25.
Table 25. A/D Converter Selection
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _ADCCH2
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 1
1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁
ADCCH1
0
0
1
1
0
0
1
1
ADCCH0
0
1
0
1
0
1
0
1
A/D CONVERTER INPUT SELECTION
A/D conversion of ADIN1
A/D conversion of ADIN2
A/D conversion of ADIN3
A/D conversion of ADIN4
A/D conversion of ADIN5
A/D conversion of ADIN5
A/D conversion of ADIN5
A/D conversion of ADIN5
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{AFCCK (0–1): Selection of the sampling frequency of the AFC, see Table 26.}
ÁÁÁÁÁÁÁÁÁÁÁÁ_AFÁÁÁÁÁÁ_C0011CKÁÁÁÁÁÁ₁ ÁÁÁÁÁÁÁÁÁÁÁÁ^TÁÁÁÁÁÁ_A^a_F^b_CÁÁÁÁÁÁ^l₀₁₀₁^e_CK²ÃÃÃÃÃÃ₀^{6. A}ÁÁÁÁÁÁ^FCÁÁÁÁÁÁ^Se_AÁÁÁÁÁÁ^l_F^e_C^cÁÁÁÁÁÁ_I^t_N^io_Tⁿ_0012EÁÁÁÁÁÁ_{..RMM2550NHHA}ÁÁÁÁÁÁ_MMzzLHHFzzÁÁÁÁÁÁ_REQÁÁÁÁÁÁ_UENÁÁÁÁÁÁ_CYÁÁÁÁÁÁÁÁÁÁÁÁ
AFCPN:
If cleared to 0, the AFC block is powered down under the control of the PWRDN terminal. If
this bit is set to 1, the power down is only controlled by bit AFCPD.
AFCPD:
This bit is functionally associated and paired with bit AFCPN. When the AFCPN bit is 1, the
AFC block is active. When the AFCPD bit is set to 1, the AFCPD block is in power-down
mode.
ADCPN:
If cleared to 0, the auxiliary ADC block is powered down when under the control of PWRDN.
If this bit is set to 1, the power down is only controlled by bit ADCPD.
ADCPD:
This bit is functionally associated and paired with bit ADCPN. When the ADCPN bit is set to
1, an auxiliary ADC is active. When the ADCPD bit is set to 1, the auxiliary ADCPD is in
power-down mode.
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