|
TCM4400E Datasheet, PDF (56/64 Pages) Texas Instruments – GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT | |||
|
◁ |
TCM4400E
GSM/DCS BASEBAND AND VOICE A/D
AND D/A RF INTERFACE CIRCUIT
SLWS082A â JULY 1999 â REVISED MARCH 2000
PRINCIPLES OF OPERATION
automatic frequency control registers (1 and 2)
There are two AFC control registers; each is 10 bits wide. AFC control register No. 1 contains the least significant
bit of the AFC D/A converter output. AFC control register No. 2 contains the most significant bit of the AFC D/A
converter input. See Tables 27 and 28. The AFC value is loaded after writing to the AFC MSB register (first) and
then the LSB register (second) .
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ BIT9
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ R/W
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0
BIT8
R/W
0
Table 27. AFC Control Register 1
AUXAFC1: AUTOMATIC FREQUENCY CONTROL REG1
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT1
R/W
0
BIT0
R/W
0
ADDRESS: 14 R/W
0 1 1 1 0 1/0
<âACCESS TYPE
<âVALUE AT RESET
BIT 9â0:
LSB input of the 13-bit AFC D/A converter in 2s complement.
Table 28. AFC Control Register 2
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ RESRVD
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ R = 0
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0
RESRVD
R=0
0
AUXAFC2: AUTOMATIC FREQUENCY CONTROL REG2
RESRVD RESRVD RESRVD RESRVD RESRVD BIT12
R=0
R=0
R=0
R=0
R=0
R/W
0
0
0
0
0
0
BIT11
R/W
0
BIT10
R/W
0
ADDRESS: 15 R/W
0 1 1 1 1 1/0
<âACCESS TYPE
<âVALUE AT RESET
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ BIT 12â10: MSB input of the 13-bit AFC D/A converter in 2s complement.
automatic power control register
The values in the automatic power control (APC) register set the operating conditions for the APC circuit, see
Table 29.
Table 29. APC Register
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ RESERVD RESERVD
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ R = 0
R=0
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 0
0
AUXAPC: AUTOMATIC POWER CONTROL REGISTER
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT1
R/W
0
BIT0
R/W
0
ADDRESS: 16 R/W
1 0 0 0 0 1/0
<âACCESS TYPE
<âVALUE AT RESET
BIT 7â0:
Input of the 8-bit level APC DAC.
RESERVD: Reserved bits for testing
56
⢠POST OFFICE BOX 655303 DALLAS, TEXAS 75265
|
▷ |