DS90UH927Q Datasheet, PDF (41/59 Pages) Texas Instruments – 5MHz - 85MHz 24-bit Color FPD-Link III Serializer with HDCP

DS90UH927Q
ADD
(dec)
32
ADD
(hex)
0x20
Register
Name
Deserializer
Capabilities
Bit(s)
7
6:2
1
0
Register
Type
RW
RW
RW
Default
(hex)
0x00
Function
Freeze
DES CAP
HD Audio
FC GPIO
Description
Freeze Deserializer Capabilities
Prevent auto-loading of the Deserializer
Capabilities by the Bidirectional Control Channel.
The Capabilities will be frozen at the values written
in registers 0x20 and 0x21.
0: Normal operation (default)
1: Freeze
Reserved
Deserializer supports 24-bit video concurrently
with HD audio
This field is automatically configured by the
Bidirectional Control Channel once RX Lock has
been detected. Software may overwrite this value,
but must also set the FREEZE DES CAP bit to
prevent overwriting by the Bidirectional Control
Channel.
0: Normal operation (default)
1: Freeze
Deserializer supports GPIO in the Forward
Channel Frame
This field is automatically configured by the
Bidirectional Control Channel once RX Lock has
been detected. Software may overwrite this value,
but must also set the FREEZE DES CAP bit to
prevent overwriting by the Bidirectional Control
Channel.
0: Normal operation (default)
1: Freeze
Copyright © 1999-2012, Texas Instruments Incorporated
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