DS90UH927Q Datasheet, PDF (30/59 Pages) Texas Instruments – 5MHz - 85MHz 24-bit Color FPD-Link III Serializer with HDCP

DS90UH927Q
FIGURE 24. START and STOP Conditions
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To communicate with a remote device, the host controller (master) sends the slave address and listens for a response from the
slave. This response is referred to as an acknowledge bit (ACK). If a slave on the bus is addressed correctly, it Acknowledges
(ACKs) the master by driving the SDA bus low. If the address doesn't match a device's slave address, it Not-acknowledges (NACKs)
the master by letting SDA be pulled High. ACKs also occur on the bus when data is being transmitted. When the master is writing
data, the slave ACKs after every data byte is successfully received. When the master is reading data, the master ACKs after every
data byte is received to let the slave know it wants to receive another data byte. When the master wants to stop reading, it NACKs
after the last data byte and creates a stop condition on the bus. All communication on the bus begins with either a Start condition
or a Repeated Start condition. All communication on the bus ends with a Stop condition. A READ is shown in Figure 25 and a
WRITE is shown in Figure 26.
FIGURE 25. Serial Control Bus — READ
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FIGURE 26. Serial Control Bus — WRITE
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The I2C Master located at the DS90UH927Q serializer must support I2C clock stretching. For more information on I2C interface
requirements and throughput considerations, please refer to TI Application Note SNLA131.
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