DS90UH927Q Datasheet, PDF (39/59 Pages) Texas Instruments – 5MHz - 85MHz 24-bit Color FPD-Link III Serializer with HDCP

DS90UH927Q
ADD
(dec)
23
24
25
26
27
ADD Register
(hex) Name
0x17 I2C Control
Bit(s)
7
6:4
3:0
0x18 SCL High Time 7:0
0x19 SCL Low Time 7:0
0x1A Data Path
7
Control 2
6:1
0
0x1B BIST BC Error 7:0
Count
Register
Type
RW
RW
RW
RW
RW
RW
RW
R
Default
(hex)
0x1E
0xA1
0xA5
0x00
0x00
Function Description
I2C Pass
All
Pass All
0: Enable Forward Control Channel pass-through
only of I2C accesses to I2C Slave IDs matching
either the remote Deserializer Slave ID or the
remote Slave ID. (default)
1: Enable Forward Control Channel pass-through
of all I2C accesses to I2C Slave IDs that do not
match the Serializer I2C Slave ID.
SDA Hold
Time
Internal SDA Hold Time
Configures the amount of internal hold time
provided for the SDA input relative to the SCL
input. Units are 40 nanoseconds.
I2C Filter
Depth
Configures the maximum width of glitch pulses on
the SCL and SDA inputs that will be rejected. Units
are 5 nanoseconds.
SCL HIGH I2C Master SCL High Time
Time
This field configures the high pulse width of the
SCL output when the Serializer is the Master on
the local I2C bus. Units are 40 ns for the nominal
oscillator clock frequency.
SCL LOW I2C SCL Low Time
Time
This field configures the low pulse width of the SCL
output when the Serializer is the Master on the
local I2C bus. This value is also used as the SDA
setup time by the I2C Slave for providing data prior
to releasing SCL during accesses over the
Bidirectional Control Channel. Units are 40 ns for
the nominal oscillator clock frequency.
Block I2S
Auto
Config
Block automatic I2S mode configuration
(repeater only)
0: I2S mode (2-channel, 4-channel, or surround)
is detected from the in-band audio signaling
1: Disable automatic detection of I2S mode
Reserved
I2S
Surround
Enable 5.1- or 7.1-channel I2S audio transport
0: 2-channel or 4-channel I2S audio is enabled as
configured in register 0x12 bits 3 and 0 (default)
1: 5.1- or 7.1-channel audio is enabled
Note that I2S Data Island Transport is the only
option for surround audio. Also note that in a
repeater, this bit may be overridden by the in-band
I2S mode detection.
BIST BC
Errorr
BIST Back Channel CRC Error Counter
This register stores the back-channel CRC error
count during BIST Mode (saturates at 255 errors).
Clears when a new BIST is initiated or by 0x04[5]
Copyright © 1999-2012, Texas Instruments Incorporated
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