DS90UH926QSQE Datasheet, PDF (21/56 Pages) Texas Instruments – DS90UH926Q 720p 24-bit Color FPD-Link III Deserializer with HDCP

DS90UH926Q
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SNLS337J – OCTOBER 2010 – REVISED APRIL 2013
Sample Rate (kHz)
96
192
32
44.1
48
96
192
Table 5. Audio Interface Frequencies (continued)
I2S Data Word Size
(bits)
24
24
32
32
32
32
32
I2S CLK
(MHz)
4.608
9.216
2.048
2.822
3.072
6.144
12.288
MCLK Output
(MHz)
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
x1 of I2S CLK
x2 of I2S CLK
x4 of I2S CLK
Bit [6:4]
(Address 0x3A)
010
011
100
011
100
101
001
010
011
001
010
011
001
010
011
010
011
100
011
100
110
GPIO[3:0] and GPO_REG[8:4]
In 18-bit RGB operation mode, the optional R[1:0] and G[1:0] of the DS90UH926Q can be used as the general
purpose IOs GPIO[3:0] in either forward channel (Outputs) or back channel (Inputs) application.
GPIO[3:0] Enable Sequence
See Table 6 for the GPIO enable sequencing.
Step 1: Enable the 18-bit mode either through the configuration register bit Table 9 on DS90UH925Q only.
DS90UH926Q is automatically configured as in the 18-bit mode.
Step 2: To enable GPIO3 forward channel, write 0x03 to address 0x0F on DS90UH925Q, then write 0x05 to
address 0x1F on DS90UH926Q.
#
Description
1
Enable 18-bit
mode
2
GPIO3
3
GPIO2
4
GPIO1
5
GPIO0
Table 6. GPIO Enable Sequencing Table
Device
DS90UH925Q
DS90UH926Q
DS90UH925Q
DS90UH926Q
DS90UH925Q
DS90UH926Q
DS90UH925Q
DS90UH926Q
DS90UH925Q
DS90UH926Q
Forward Channel
0x12 = 0x04
Auto Load from DS90UH925Q
0x0F = 0x03
0x1F = 0x05
0x0E = 0x30
0x1E = 0x50
0x0E = 0x03
0x1E = 0x05
0x0D = 0x93
0x1D = 0x95
Back Channel
0x12 = 0x04
Auto Load from DS90UH925Q
0x0F = 0x05
0x1F = 0x03
0x0E = 0x50
0x1E = 0x30
0x0E = 0x05
0x0E = 0x05
0x0D = 0x95
0x1D = 0x93
Copyright © 2010–2013, Texas Instruments Incorporated
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