TI380PCIA Datasheet, PDF (16/40 Pages) Texas Instruments – PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS

TI380PCIA
PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS™
SPWS035 – JUNE 1997
serial EEPROM interface (EIF) (continued)
The algorithm for generating the cyclic-redundancy check (CRC) code placed in the serial EEPROM byte 08
is shown in Figure 5. When the TI380PCIA reads the EEPROM after power up, it checks the CRC in byte 08
to ensure that it was generated with this algorithm. If the CRC from byte 08 of the EEPROM does not match
the CRC calculated from EEPROM bytes 00 – 07, then the TI380PCIA sets the NEP and ECRCERR bits in the
EEPROM read/write register. When the NEP and ECRCERR bits are set because of a CRC mismatch on the
data read from the EEPROM, the TI380PCIA still continues to load the data read from the EEPROM into the
PCI configuration registers. In the event that the EEPROM is unprogrammed, the TI380PCIA configuration
registers can be left in an unknown state. In such a case, the EEPROM can be initialized by using PCI BIOS
calls to read the hardwired configuration register addresses associated with each PCI slot. The slot containing
the TI380PCIA responds with the contents of the hardwired registers. Once the slot containing the TI380PCIA
has been identified, the EEPROM can be programmed using the EEPROM register in the PCI configuration
space. After the next power cycle, the TI380PCIA loads the contents of the initialized EEPROM.
Input MSB to LSB >> LS
on each clock
XOR
MS CRC MSB to LSB >> LS
CRC SEED = 10101010
Figure 4. CRC Code Calculation
It is assumed that data in the serial EEPROM is shifted LSB to MSB, consistent with other serial communication
streams.
The routine that calculates the serial EEPROM CRC over the first eight bytes of the EEPROM is shown in
Figure 5. The resulting value is written to the ninth byte of the EEPROM. The “MSB” argument passed is a copy
of the bytes read from the EEPROM and stored in an array. The BIA has its own checksum, which is not verified
by the TI380PCIA.
unsigned short xor-crc (unsigned short *msb, int bytes)
{
BYTE crc=0xaa; // seed
int i;
for (i=0; i<bytes; i++)
crc^=msb[i];
return (crc);
}
Figure 5. EEPROM CRC Calculation Routine
The BIA downloaded from the EEPROM ultimately appears in the adapter RAM at chapter 0, address 0. The
high or odd byte of each 16-bit word contains two hexadecimal digits of the 12-digit BIA, the most significant
digit first. The last two high bytes of the first eight 16-bit words contain the 16-bit checksum of the BIA. The
checksum is calculated as shown below.
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