TI380PCIA Datasheet, PDF (1/40 Pages) Texas Instruments – PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS

TI380PCIA
PCI BUS INTERFACE FOR THE TI380 COMMPROCESSORS™
D Glueless Interface Between the Peripheral
Component Interconnect (PCI) Bus and the
TI380C2x^† and TI380C3x^† Generation of
Processors
D Compliant With PCI Specification,
Revision 2.0^‡§
D Allows Use of Existing TI2000 Drivers
D Includes TI2000 Interface Configuration
Register
D Supports Bus Master Operations for High
Performance
D Provides 32-Bit Address-Data Path
D Implements Address / Data Parity Checking
D Includes Internal Error Checking for Illegal
Bus Operations
SPWS035 – JUNE 1997
D Supports Direct Memory Access (DMA)
Bursts With 64-Byte FIFO
D Supports EPROM Interface for Remote
Program Load (RPL) Operation
D Supports Inter-Integrated Circuit (I²C)
Interface for Optional Serial EEPROM for
Configuration Information
D Allows Burned-In Address (BIA) to be
Implemented in Configuration EEPROM
D Includes NAND Tree Structure to Allow for
In-Circuit Connectivity Testing
D 144-Pin JEDEC Plastic Quad Flat Package
(PCM Suffix)
D Operating Temperature Range
0_C to 70_C
description
The TI380PCIA provides a glueless interface between a TI380C2x^† commprocessor and the PCI bus (see
Figure 1). The TI380PCIA transfers information / data between the PCI bus and the TI380C2x^† system interface
(SIF ) using any of these three methods:
D Direct memory access (DMA)
D Direct input /output (DIO)
D Pseudo-direct memory access (PDMA)
DMA (or PDMA) transfers all data between host memory (by way of the PCI local bus) and TI380C2x^† local
memory. DIO accesses are typically used to load software into TI380C2x^† local memory and for initializing the
TI380C2x^†.
The TI380PCIA conforms to the PCI standards found in “PCI Local Bus Specification,” Revision 2.0.^‡§
The TI380PCIA is available in a 144-pin JEDEC plastic quad flat package (PCM suffix) and is rated from 0_C
to 70_C. It is a drop-in replacement for the TI380PCI.
PCI Bus
EEPROM
TI380PCIA
SIF
TI380C2x†
PacketBlaster™
Frame-Processing
Accelerator (FPA)
DRAM
RPL
ROM
Physical
Layer _{To Network}
Figure 1. TI380PCIA Applications Diagram
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
† _{TI380C3x devices can be used with TI380PCIA in the same way as TI380C2x devices.}
‡ _{The “PCI Local Bus Specification”, Revision 2.0, and the TI380C2x or TI380C3x series of data sheets (e.g., literature number SPWS012) should}
be used as references to this document.
§ _{Exceptions to electrical timing parameters specified in PCI Specification Revision 2.0 are described in Note 8 and Note 10 of the timing}
requirements section of this document.
PacketBlaster and Commprocessor are trademarks of Texas Instruments Incorporated.
ADVANCE INFORMATION concerns new products in the sampling or
preproduction phase of development. Characteristic data and other
specifications are subject to change without notice.
Copyright © 1997, Texas Instruments Incorporated
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