SDA5250 Datasheet, PDF (76/143 Pages) Siemens Semiconductor Group – TVTEXT 8-Bit Microcontroller

SDA 525x
capacitor, the more slowly V_RST decreases. V_RST must remain below the lower threshold of
the Schmitt Trigger long enough to effect a complete reset. The time required is the
oscillator start-up time plus 4 machine cycles.
Attention: While reset is active and at least four machine cycles after rising edge of
RST, ALE, P4.0 and P3.6 should not be pulled down externally. Otherwise a special
production test mode is entered.
V_DD
V_DD
V_RST
V_SS
RST
10 µF
V_SS
UES04722
Figure 24
Power-On Reset Circuit
Power-Down Operations
The controller provides two modes in which power consumption can be significantly
reduced.
– Idle mode. The CPU is gated off from the oscillator. All peripherals are still provided
with the clock and are able to work.
– Power-down mode. Operation of the controller is turned off. This mode is used to save
the contents of internal RAM with a very low standby current.
Both modes are entered by software. Special function register PCON is used to enter
one of these modes.
Semiconductor Group
76
1998-04-08