SDA5250 Datasheet, PDF (33/143 Pages) Siemens Semiconductor Group – TVTEXT 8-Bit Microcontroller

SDA 525x
6.2.10 Sandcastle Decoder
To fit the requirements of various applications the input circuit of the sandcastle decoder
is programmable. Both slicing levels (V_SCH, V_SCL2) which are important for proper SC-
decoder function can be varied in a range of about 0.9 V and in addition there is the
possibility to increase the implemented hysteresis by 0.3 V typically. Further noise
reduction and spike rejection on pin SC is accomplished by using a digital filter following
the input circuitry. See Figure 41 on page 133 for further information on V_SCH and V_SCL2.
Sandcastle Control Register SCCON
Sandcastle Control Register
Default after reset: 00_H
(MSB)
0
SCCH.2 SCCH.1
SCCON
SCCH.0
0
SFR-Address CE_H
(LSB)
SCCL.2 SCCL.1 SCCL.0
SCCL1...0
SCL.2
SCCH1...0
SCCH.2
Attention
00 = set V_SCL2 to lowest level (1.0 V typ.)
01 = increase V_SCL2 by 0.3 V (typ.)
10 = increase V_SCL2 by 0.6 V (typ.)
11 = increase V_SCL2 by 0.9 V (typ.)
0 = hysteresis V_SCL2 set to 0.3 V (typ.)
1 = increase hysteresis V_SCL2 by 0.6 V (typ.)
00 = set V_SCH to lowest level 3.0 V (typ.)
01 = increase V_SCH by 0.3 V (typ.)
10 = increase V_SCH by 0.6 V (typ.)
11 = increase V_SCH by 0.9 V (typ.)
0 = hysteresis V_SCH set to 0.3 V (typ.)
1 = increase hysteresis V_SCH by 0.6 V
Bits 3 and 7 have to be set to ‘0’.
Semiconductor Group
33
1998-04-08