SDA5250 Datasheet, PDF (72/143 Pages) Siemens Semiconductor Group – TVTEXT 8-Bit Microcontroller

SDA 525x
6.3.4.2 External Interrupts
The external interrupt request inputs (INT0 and INT1) can be programmed for either
transition- activated or level-activated operation. Control of the external interrupts is
provided by the four low- order bits of TCON as shown in the follow section.
When IT0 and IT1 are set to one, interrupt requests on INT0 and INT1 are transition-
activated (high-to-low), else they are low-level activated. IE0 and IE1 are the interrupt
request flags. These flags are set when their corresponding interrupt request inputs at
INT0 and INT1, respectively, are low when sampled by the processor and the transition-
activated scheme is selected by IT0 and IT1.
Function of Lower Nibble Bits in TCON
Timer and Interrupt Control
Register
Default after reset: 00_H
(MSB)
TF1
TR1
TF0
TCON
TR0
IE1
SFR-Address 88_H
(LSB)
IT1
IE0
IT0
TCON.4 – TCON.7
IE1
IT1
IE0
IT0
See Chapter “General Purpose Timers/Counters” on
page 80.
Interrupt 1 edge flag. Set by hardware when external interrupt
edge detected. Cleared when interrupt processed.
Interrupt 1 type control bit. Set/cleared by software to specify
falling edge/low level triggered external interrupts. IT1 = 1
selects transition-activated external interrupts.
Interrupt 0 edge flag. Set by hardware when external interrupt
edge detected. Cleared when interrupt processed.
Interrupt 0 type control bit. Set/cleared by software to specify
falling edge/low level triggered external interrupts. IT0 = 1
selects transition-activated external interrupts.
Semiconductor Group
72
1998-04-08