SDA5250 Datasheet, PDF (18/143 Pages) Siemens Semiconductor Group – TVTEXT 8-Bit Microcontroller

SDA 525x
6.1.4
Acquisition Control Registers
The following sections gives an overview about special function registers ACQMS_1,
ACQMS_2 and ACQSIR, with which slicer and acquisition can be controlled:
Acquisition Mode and Status Register ACQMS_1
Acquisition Mode and Status
Register
Default after reset: 00_H
(MSB)
0
0
VPSE
ACQMS_1
SFR-Address C1_H
(LSB)
0
CRIC.1 CRIC.0 ENERT TTXE
TTXE
ENERT
CRIC.1 ... CRIC.0
VPSE
Comments
1: enable TTX in lines 6 - 22
1: allow 1 bit error for TTX
00: The CRI is not included in FRC
01: last 2 bits of CRI are included in the FRC
10: last 4 bits of CRI are included in the FRC
11: last 8 bits of CRI are included in the FRC
1: enable VPS in line 16. Text-reception in this line is
automatically disabled
Bits 4, 6 and 7 are not defined, must be set to 0
Acquisition Mode and Status Register ACQMS_2
Acquisition Mode and Status
Register
Default after reset: 00_H
(MSB)
TEST.7 TEST.6 TEST.5
ACQMS_2
TEST.4 TEST.3
TEST.2
SFR-Address C2_H
(LSB)
TEST.1 TEST.0
Comments
all bits have to be set to 0. Setting any of these bits will switch
on special slicer test modes for production test
Semiconductor Group
18
1998-04-08