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SDA5250 Datasheet, PDF (134/143 Pages) Siemens Semiconductor Group – TVTEXT 8-Bit Microcontroller
SDA 525x
Display-Generator-Timing
Table 37
TA = 0 to 70 °C; VDD = 5 V ± 10 %, VSS = 0 V
Parameter
Symbol
Hsync width
End of visible screen area to
Hsync ‘1’
Start of visible screen area to
Hsync ‘0’
Delay between Hsync and
R/G/B/BLAN/COR-lines
tHHHL
tVLHH
tHLVH
tHHCL
Limit Values
min.
max.
2.8 / 1.41)
–
0
–
0
–
25
100
1) default after reset is 2.8 µs; if bit 7 in SFR 0CDH is set, the second value is valid
Unit
µs
ns
ns
ns
Horizontal
Flyback
Visible Area
tHHHL
HS applied
to SDA525x
tHHCL
R/G/B/BLAN/
COR
Figure 42
Horizontal Sync-Timing
tVLHH
tHLVH
Semiconductor Group
134
1998-04-08