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| K4B2G0446D Datasheet, PDF (62/64 Pages) Samsung semiconductor – 2Gb D-die DDR3L SDRAM | |||
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K4B2G0446D
K4B2G0846D
datasheet
Rev. 1.01
DDR3L SDRAM
NOTE :Clock and Strobe are drawn on a different time scale.
tIS
tIH
CK
CK
DQS
DQS
VDDQ
tDS tDH
VIH(AC) min
VIH(DC) min
dc to VREF
region
VREF(DC)
nominal
slew rate
VIL(DC) max
VIL(AC) max
tIS tIH
tDS tDH
nominal
slew rate
dc to VREF
region
VSS
â TR
â TF
Hold Slew Rate
Rising Signal =
VREF(DC) - VIL(DC)max
â TR
Hold Slew Rate
Falling Signal
=
VIH(DC)min - VREF(DC)
â TF
Figure 26. Illustration of nominal slew rate for hold time tDH (for DQ with respect to strobe) and tIH
(for ADD/CMD with respect to clock).
- 62 -
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