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| K4B1G0446D Datasheet, PDF (52/60 Pages) Samsung semiconductor – 1Gb D-die DDR3 SDRAM Specification | |||
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K4B1G04(08/16)46D
1Gb DDR3 SDRAM
Note :Clock and Strobe are drawn on a different time scale.
tIS
tIH
CK
tIS tIH
CK
DQS
DQS
VDDQ
tDS tDH
VIH(AC) min
VREF to ac
region
VIH(DC) min
VREF(DC)
VIL(DC) max
nominal slew
rate
VIL(AC) max
VSS
tVAC
tDS tDH
tVAC
nominal
slew rate
VREF to ac
region
Delta TF
Setup Slew Rate= VREF(DC) - VIL(AC)max
Falling Signal
Delta TF
Delta TR
SeRtiuspinSgleSwignRaalte=
VIH(AC)min - VREF(DC)
Delta TR
Figure 21 - Illustration of nominal slew rate and tVAC for setup time tDS (for DQ with respect to strobe) and tIS
(for ADD/CMD with respect to clock).
Page 52 of 60
Rev. 1.1 August 2008
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