K4X56163PE Datasheet, PDF (31/48 Pages) Samsung semiconductor – 16M x16 Mobile DDR SDRAM

K4X56163PE-L(F)G
Mobile-DDR SDRAM
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, Temp = -25 to 85°C)
Parameter
Symbol
Test Condition
DDR200 DDR133
Operating Current
(One Bank Active)
t RC = t RCmin ; t CK = t CKmin ; CKE is HIGH; CS is HIGH
ICC0 ^{between valid commands;}
30
30
address inputs are SWITCHING; data bus inputs are STA-
BLE
all banks idle, CKE is LOW; CS is HIGH, t CK = t CKmin ;
ICC2P address and control inputs are SWITCHING; data bus inputs
0.3
Precharge Standby Current in
are STABLE
power-down mode
all banks idle, CKE is LOW; CS is HIGH, CK = LOW, CK =
ICC2PS HIGH; address and control inputs are SWITCHING; data
0.3
bus inputs are STABLE
all banks idle, CKE is HIGH; CS is HIGH, t CK = t CKmin
ICC2N ;address and control inputs are SWITCHING; data bus
8
8
Precharge Standby Current
inputs are STABLE
in non power-down mode
all banks idle, CKE is HIGH; CS is HIGH, CK = LOW, CK =
ICC2NS _{HIGH; address and control inputs are SWITCHING; data}
4
4
bus inputs are STABLE
one bank active, CKE is LOW; CS is HIGH, t CK = t CKmin
ICC3P ;address and control inputs are SWITCHING; data bus
3
Active Standby Current
inputs are STABLE
in power-down mode
one bank active, CKE is LOW; CS is HIGH, CK = LOW, CK
ICC3PS = HIGH;address and control inputs are SWITCHING; data
1
bus inputs are STABLE
Active Standby Current
in non power-down mode
(One Bank Active)
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
one bank active, CKE is HIGH; CS is HIGH, t CK = t CKmin
ICC3N ;address and control inputs are SWITCHING; data bus
10
inputs are STABLE
one bank active, CKE is HIGH; CS is HIGH, CK = LOW, CK
ICC3NS ^{= HIGH;}
6
address and control inputs are SWITCHING; data bus inputs
are STABLE
one bank active; BL = 4; CL = 3; t CK = t CKmin ; continuous
ICC4R ^{read bursts; I OUT = 0 mA}
65
address inputs are SWITCHING; 50% data change each
burst transfer
one bank active; BL = 4; t CK = t CKmin ; continuous write
ICC4W bursts;address inputs are SWITCHING; 50% data change
65
each burst transfer
ICC5
ICC6
t RC = t RFCmin ; t CK = t CKmin ; burst refresh; CKE is
HIGH;address and control inputs are SWITCHING; data bus
inputs are STABLE
CKE is LOW; t CK = t CKmin ;
Extended Mode Register set to all 0’s;
address and control inputs are STABLE;
data bus inputs are STABLE
TCSR Range
Full Array
1/2 Array
1/4 Array
80
Max 40
150
125
115
10
6
55
55
80
Max 85
400
300
250
Notes:
1. IDD specifications are tested after the device is properly intialized.
2. Input slew rate is 1V/ns.
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
°C
uA
31
March 2004