K4J55323QF-GC Datasheet, PDF (16/49 Pages) Samsung semiconductor – 256Mbit GDDR3 SDRAM

K4J55323QF-GC
256M GDDR3 SDRAM
DLL ENABLE/DISABLE
The DLL must be enabled for normal operation. DLL enable is required during power-up initialization and upon returning
to normal operation after disabling the DLL for debugging or evaluation. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled, 20K clock cycles must occur before a READ command can be
issued.
DATA TERMINATION
The Data Termination, DT, is used to determine the value of the internal data termination resisters. The GDDR3 SDRAM
supports 60Ω and 120Ω termination. The termination may also be disabled for testing and other purposes.
DATA DRIVER IMPEDANCE
The Data Driver impedance (DZ) is used to determine the value of the data drivers impedance. When autocalibration is
used the data driver impedance is set to 40Ωs and it’s tolerance is determined by the calibration accuracy of the device.
When any other value is selected the target impedance is set nominally to the desired impedance. However, the accuracy
is now determined by the device’s specific process corner, applied voltage and operating temperature.
ADDITIVE LATENCY
The Additive Latency function (AL) is used to optimize the command bus efficiency. The AL value is used to determine the
number of clock cycles that is to be added to CL after CAS is captured by the rising edge of CK. Thus the total CAS latency
0
is determined by adding CL and AL.
MANUFACTURERS VENDOR CODE AND REVISION IDENTIFICATION
The Manufacturers Vendor Code, V, is selected by issuing a EXTENDED MODE REGISTER SET command with bits A10
set to one, and bits A0-A9 and A11 set to the desired values. When the V function is enabled the GDDR3 SDRAM will pro-
vide its manufacturers vendor code on DQ[3:0] and revision identification on DQ[7:4]
Manufacturer
Reserved
Samsung
Infineon
Elpida
Etron
Nanya
DQ[3:0]
0
1
2
3
4
5
Manufacturer
Hynix
Mosel
Winbond
ESMT
Reserved
Reserved
DQ[3:0]
6
7
8
9
A
B
Manufacturer
Reserved
Reserved
Reserved
Micron
DQ[3:0]
C
D
E
F
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Rev 1.8 (Apr. 2005)