HD6413003TF10 Datasheet, PDF (712/717 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Table D-1 Port States (cont)
Pin
Name
Mode
Reset
State
Hardware Software
Standby Standby
Mode Mode
Bus-
Released
Mode
Program
Execution
Sleep Mode
P8₀
1 to 4
T
T
(RFSHE = 0) (RFSHE = 0) I/O port
keep
keep
(RFSHE = 0)
(RFSHE = 1) (RFSHE = 1) or RFSH
RFSH
H
(RFSHE = 1)
P8₃ to P8₁ 1 to 4
T
T
(DDR = 0) keep
Input port
T
(DDR = 0) or
(DDR = 1)
H
CS₃ to CS₁
(DDR = 1)
P8₄
1 to 4
L
T
(DDR = 0) keep
Input port
T
(DDR = 0)
(DDR = 1)
L
or CS₀
(DDR = 1)
P9₅ to P9₀ 1 to 4
T
T
keep
keep
I/O port
PA₇ to PA₀ 1 to 4
T
T
keep
keep
I/O port
PB₇ to PB₀ 1 to 4
T
T
keep
keep
I/O port
PC₇, PC₆ 1 to 4
T
T
keep
keep
I/O port
PC₁, PC₀
PC₅ to PC₂ 1 to 4
T
T
(DDR = 0) keep
Input port
keep
(DDR = 0) or
(DDR = 1)
H
CS₇ to CS₄
(DDR = 1)
Legend
H: High
L: Low
T: High-impedance state
keep: Input pins are in the high-impedance state; output pins maintain their previous state.
DDR: Data direction register bit
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