HD6413003TF10 Datasheet, PDF (249/717 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8.4.14 DMAC States in Reset State, Standby Modes, and Sleep Mode
When the chip is reset or enters hardware or software standby mode, the DMAC is initialized.
DMAC operations continue in sleep mode. Figure 8-25 shows the timing of a cycle-steal transfer
in sleep mode.
CPU cycle
DMAC cycle
T₂ T_d T₁ T₂ T₁ T₂
ø
A ₂₃ to A ₀
RD
HWR , LWR
Sleep mode
DMAC cycle
T_d T₁ T₂ T₁ T₂
Figure 8-25 Timing of Cycle-Steal Transfer in Sleep Mode
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