HD6413003TF10 Datasheet, PDF (19/717 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Page Item
Description
P514 17.3.2
Exit from Sleep Mode
Exit by Interrupt
Description amended
P529 to Table 18-4 Electrical Characteristics
P536 to 18-8
Condition values amended
P520 to Table 18-2 DC Characteristics
P526
Values changed and added to table
P529 to Table 18-4 Bus Timing
P531
Values changed
P532 Table 18-5 Refresh Controller Bus Timing
Values changed
P536 Table 18-8 A/D Conversion Characteristics Values changed
P541
Figure 18-7
DRAM Bus Timing (Read/Write):
Three-State Access
— 2WE Mode —
*added
P543
Figure 18-10 DRAM Bus Timing (Read/Write):
Three-State Access
— 2CAS Mode —
*added
P545 Figure 18-13 PSRAM Bus Timing (Read/Write): *added
Three-State Access
P555 Table A-1
Instruction Set
MOV. B Rs, @(d:16, ERd)
Operation amended
Table A-1
Instruction Set
MOV. B Rs, @(d:24, ERd)
Operation amended
P556 Table A-1
Instruction Set
MOV. W Rs, @(d:16, ERd)
Operation amended
Table A-1
Instruction Set
MOV. W Rs, @(d:24, ERd)
Operation and number of execution
states amended
Table A-1 Instruction Set MOV. L #xx:32, Rd Number of execution states amended
Table A-1 Instruction Set POP, L ERn
Number of execution states amended
P557 Table A-1 Instruction Set PUSH. L ERn
Number of execution states amended
P566 Table A-1 Instruction Set STC
Menmonics amended (3 places)
P575 Table A-3
Number of Cycles per Instruction Internal operation added
BSRd:16
P673 Figure C-4 Port 7 Block Diagram (Pin P7n) Figure amended