HD6413003TF10 Datasheet, PDF (267/717 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Port 5 Data Register (P5DR): P5DR is an 8-bit readable/writable register that stores data for pins
P5₇ to P5₄.
Bit
Initial value
Read/Write
7
P5 ₇
0
R/W
6
P5 ₆
0
R/W
5
P5 ₅
0
R/W
4
P5 ₄
0
R/W
3
P5 ₃
0
R/W
2
P5 ₂
0
R/W
1
P5 ₁
0
R/W
0
P5 ₀
0
R/W
Port 5 data 7 to 4
These bits store data
for port 5 pins
Reserved bits
When a bit in P5DDR is set to 1, if port 5 is read the value of the corresponding P5DR bit is
returned directly, regardless of the actual state of the pin. When a bit in P5DDR is cleared to 0, if
port 5 is read the corresponding pin level is read.
Bits P5₃ to P5₀ are reserved. They can be written and read, but they cannot be used for port input
or output.
P5DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Port 5 Input Pull-Up Control Register (P5PCR): P5PCR is an 8-bit readable/writable register
that controls the MOS input pull-up transistors in port 5.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P5₇PCR P5₆PCR P5₅PCR P5₄PCR P5₃PCR P5₂PCR P5₁PCR P5₀PCR
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port 5 input pull-up control 7 to 4
These bits control input pull-up
transistors built into port 5
Reserved bits
In modes 1 and 2, when a P5DDR bit is cleared to 0 (selecting generic input), if the corresponding
bit from P5₇PCR to P5₄PCR is set to 1, the input pull-up transistor is turned on.
Bits P5₃PCR to P5₀PCR are reserved. They can be written and read, but they do not control input
pull-up transistors.
P5PCR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting.
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