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HD6413003TF10 Datasheet, PDF (555/717 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
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Table 18-7 Timing of On-Chip Supporting Modules (cont)
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 8 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition B: VCC = 3.0 V to 5.5 V, AVCC = 3.0 V to 5.5 V, VREF = 3.0 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 10 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 16 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Item
SCI
Ports
and
TPC
Transmit data
delay time
Receive data
setup time
(synchronous)
Receive data
hold time
(synchronous)
Output data
delay time
Input data
setup time
(synchronous)
Input data
hold time
(synchronous)
Symbol
tTXD
Condition A Condition B Condition C
8 MHz
10 MHz
16 MHz
Min Max Min Max Min Max
— 100 — 100 — 100
Unit
ns
Test
Conditions
Figure 18-24
tRXS
100 — 100 — 100 —
tRXH
100 — 100 — 100 —
tPWD
tPRS
— 100 — 100 — 100 ns
50 — 50 — 50 —
Figure 18-20
tPRH
50 — 50 — 50 —
H8/3003
output pin
C
5V
C = 90 pF: ports 4, 5, 6, 8, C,
RL
A19 to A0, D15 to D8 ,
ø, AS, RD, HWR , LWR
C = 30 pF: ports 9, A, B
RL = 2.4 kΩ
R H = 12 kΩ
RH
Input/output timing measurement levels
• Low: 0.8 V
• High: 2.0 V
Figure 18-3 Output Load Circuit
535
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