RL78G12_15 Datasheet, PDF (44/110 Pages) Renesas Technology Corp – RENESAS MCU

RL78/G12
2. ELECTRICAL SPECIFICATIONS (A, D: TA = −40 to +85°C)
<R> (8) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock
output) (2/3)
(TA = −40 to +85°C, 1.8 V ≤ VDD ≤ 5.5 V, VSS = 0 V)
Parameter
Symbol
Conditions
HS (high-speed LS (low-speed
Unit
main) Mode
main) Mode
MIN. MAX. MIN. MAX.
SIp setup time
tSIK1
4.0 V ≤ VDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
81
479
ns
(to SCKp↑) ^{Note 1}
Cb = 30 pF, Rb = 1.4 kΩ
2.7 V ≤ VDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
177
479
ns
Cb = 30 pF, Rb = 2.7 kΩ
1.8 V ≤ VDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V ^{Note 2},
479
479
ns
Cb = 30 pF, Rb = 5.5 kΩ
SIp hold time
tKSI1
4.0 V ≤ VDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
19
19
ns
(from SCKp↑) ^{Note 1}
Cb = 30 pF, Rb = 1.4 kΩ
2.7 V ≤ VDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
19
19
ns
Cb = 30 pF, Rb = 2.7 kΩ
1.8 V ≤ VDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V ^{Note 2},
19
19
ns
Cb = 30 pF, Rb = 5.5 kΩ
Delay time from
SCKp↓ to
SOp output ^{Note 1}
tKSO1
4.0 V ≤ VDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
Cb = 30 pF, Rb = 1.4 kΩ
2.7 V ≤ VDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
Cb = 30 pF, Rb = 2.7 kΩ
100
100
ns
195
195
ns
1.8 V ≤ VDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V ^{Note 2},
Cb = 30 pF, Rb = 5.5 kΩ
483
483
ns
<R> Notes 1. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.
<R>
2. Use it with VDD ≥ Vb.
(Cautions and Remarks are listed on the next page.)
R01DS0193EJ0200 Rev.2.00
Sep 06, 2013
Page 44 of 106