RL78G12_15 Datasheet, PDF (15/110 Pages) Renesas Technology Corp – RENESAS MCU

RL78/G12
1. OUTLINE
(2/2)
Item
20-pin
24-pin
30-pin
R5F1026x
R5F1036x
R5F1027x
R5F1037x
R5F102Ax
R5F103Ax
Clock output/buzzer output
1
2
2.44 kHz to 10 MHz: (Peripheral hardware clock: fMAIN = 20 MHz operation)
8/10-bit resolution A/D converter
11 channels
8 channels
Serial interface
[R5F1026x (20-pin), R5F1027x (24-pin)]
 CSI: 2 channels/Simplified I²C: 2 channels/UART: 1 channel
[R5F102Ax (30-pin)]
 CSI: 1 channel/Simplified I²C: 1 channel/UART: 1 channel
 CSI: 1 channel/Simplified I²C: 1 channel/UART: 1 channel
 CSI: 1 channel/Simplified I²C: 1 channel/UART: 1 channel
[R5F1036x (20-pin), R5F1037x (24-pin)]
 CSI: 1 channel/Simplified I²C: 0 channel/UART: 1 channel
I²C bus
[R5F103Ax (30-pin)]
 CSI: 1 channel/Simplified I²C: 0 channel/UART: 1 channel
1 channel
Multiplier and divider/multiply-
accumulator
• 16 bits × 16 bits = 32 bits (unsigned or signed)
• 32 bits × 32 bits = 32 bits (unsigned)
• 16 bits × 16 bits + 32 bits = 32 bits (unsigned or signed)
DMA controller
2 channels
⎯
2 channels
⎯
2 channels
⎯
Vectored interrupt
Internal
18
16
18
16
26
19
sources
External
5
6
Key interrupt
6
10
⎯
Reset
• Reset by RESET pin
• Internal reset by watchdog timer
• Internal reset by power-on-reset
• Internal reset by voltage detector
• Internal reset by illegal instruction execution ^Note
• Internal reset by RAM parity error
• Internal reset by illegal-memory access
Power-on-reset circuit
• Power-on-reset:
1.51 V (TYP)
• Power-down-reset: 1.50 V (TYP)
Voltage detector
• Rising edge : 1.88 to 4.06 V (12 stages)
• Falling edge : 1.84 to 3.98 V (12 stages)
On-chip debug function
Provided
Power supply voltage
VDD = 1.8 to 5.5 V
Operating ambient temperature
TA = −40 to +85°C (A: Consumer applications, D: Industrial applications), TA = −40 to +105°C
(G: Industrial applications)
Note
The illegal instruction is generated when instruction code FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip debug
emulator.
R01DS0193EJ0200 Rev.2.00
Sep 06, 2013
Page 15 of 106