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RL78G12_15 Datasheet, PDF (26/110 Pages) Renesas Technology Corp – RENESAS MCU
RL78/G12
2. ELECTRICAL SPECIFICATIONS (A, D: TA = −40 to +85°C)
(2) 30-pin products
(TA = −40 to +85°C, 1.8 V ≤ VDD ≤ 5.5 V, VSS = 0 V)
Parameter Symbol
Conditions
MIN.
TYP.
MAX.
(2/2)
Unit
Supply
current Note 1
IDD2 Note 2 HALT
mode
HS (High-speed fIH = 24 MHzNote 4
main) mode Note 6
VDD = 5.0 V
VDD = 3.0 V
440 1280 μA
440 1280
fIH = 16 MHzNote 4
VDD = 5.0 V
400 1000 μA
VDD = 3.0 V
400 1000
LS (Low-speed fIH = 8 MHzNote 4
main) mode Note 6
VDD = 3.0 V
VDD = 2.0 V
260
530
μA
260
530
HS (High-speed fMX = 20 MHzNote 3,
main) mode Note 6 VDD = 5.0 V
Square wave input
Resonator connection
280 1000 μA
450 1170
fMX = 20 MHzNote 3,
VDD = 3.0 V
Square wave input
Resonator connection
280 1000 μA
450 1170
fMX = 10 MHzNote 3,
VDD = 5.0 V
Square wave input
Resonator connection
190
600
μA
260
670
fMX = 10 MHzNote 3,
VDD = 3.0 V
Square wave input
Resonator connection
190
600
μA
260
670
LS (Low-speed fMX = 8 MHzNote 3,
main) mode Note 6 VDD = 3.0 V
Square wave input
Resonator connection
95
330
μA
145
380
fMX = 8 MHzNote 3
VDD = 2.0 V
Square wave input
Resonator connection
95
330
μA
145
380
IDD3Note 5
STOP
mode
TA = −40°C
TA = +25°C
0.18 0.50 μA
0.23 0.50
TA = +50°C
0.30 1.10
TA = +70°C
0.46 1.90
TA = +85°C
0.75 3.30
<R> Notes 1. Total current flowing into VDD, including the input leakage current flowing when the level of the input pin is
fixed to VDD or VSS. The values below the MAX. column include the peripheral operation current. However,
not including the current flowing into the A/D converter, LVD circuit, I/O port, and on-chip pull-up/pull-down
resistors and the current flowing during data flash rewrite.
2. During HALT instruction execution by flash memory.
<R>
3. When high-speed on-chip oscillator clock is stopped.
4. When high-speed system clock is stopped.
5. Not including the current flowing into the 12-bit interval timer and watchdog timer.
6. Relationship between operation voltage width, operation frequency of CPU and operation mode is as
follows.
HS (High speed main) mode: VDD = 2.7 V to 5.5 V @1 MHz to 24 MHz
VDD = 2.4 V to 5.5 V @1 MHz to 16 MHz
LS (Low speed main) mode: VDD = 1.8 V to 5.5 V @1 MHz to 8 MHz
Remarks 1.
2.
3.
fMX: High-speed system clock frequency (X1 clock oscillation frequency or external main system clock
frequency)
fIH: high-speed on-chip oscillator clock frequency
Except STOP mode, temperature condition of the TYP. value is TA = 25°C.
R01DS0193EJ0200 Rev.2.00
Sep 06, 2013
Page 26 of 106