HYB18T512400BF Datasheet, PDF(8/57 Page) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM

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HYB18T512400BF Datasheet, PDF (8/57 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM

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HYB18T512xxxBFâ[2.5â¦5]

512-Mbit Double-Data-Rate-Two SDRAM

Table 6 Pin Configuration of DDR2 SDRAM

Ball#/Pin#

Name

Pin Buffer

Type Type

Function

H8

A0

I

SSTL Address Signal 12:0, Address Signal 10/Autoprecharge

H3

A1

I

SSTL

H7

A2

I

SSTL

J2

A3

I

SSTL

J8

A4

I

SSTL

J3

A5

I

SSTL

J7

A6

I

SSTL

K2

A7

I

SSTL

K8

A8

I

SSTL

K3

A9

I

SSTL

H2

A10

I

SSTL

AP

I

SSTL

K7

A11

I

SSTL

L2

A12

I

SSTL

L8

A13

I

SSTL Address Signal 13

Note: x4/x8 512 Mbit components

NC

â

â

Note: and x16 512 Mbit components

Address Signals Ã16 organization

L2

BA0

I

SSTL Bank Address Bus 1:0

L3

BA1

I

SSTL

L1

NC

â

â

M8

A0

I

SSTL Address Signal 12:0, Address Signal 10/Autoprecharge

M3

A1

I

SSTL

M7

A2

I

SSTL

N2

A3

I

SSTL

N8

A4

I

SSTL

N3

A5

I

SSTL

N7

A6

I

SSTL

P2

A7

I

SSTL

P8

A8

I

SSTL

P3

A9

I

SSTL

M2

A10

I

SSTL

AP

I

SSTL

P7

A11

I

SSTL

R2

A12

I

SSTL

Data Signals Ã4 organizations

C8

DQ0

I/O

SSTL Data Signal 3:0

C2

DQ1

I/O

SSTL

D7

DQ2

I/O

SSTL

D3

DQ3

I/O

SSTL

Internet Data Sheet

8

Rev. 1.05, 2007-01

03292006-YBYM-WG0Z

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