HYB18T512400BF Datasheet, PDF(16/57 Page) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM

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HYB18T512400BF Datasheet, PDF (16/57 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM

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HYB18T512xxxBFâ[2.5â¦5]

512-Mbit Double-Data-Rate-Two SDRAM

3

Functional Description

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72

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REG A DDR

W

W

W W

W

W

W

-0"4

Table 10 Mode Register Definition (BA[2:0] = 000B)

Field Bits Type1)

Description

BA2 16 reg. addr. Bank Address [2]

Note: BA2 not available on 256 Mbit and 512 Mbit components

BA1 15

BA0 14

A13 13

0B BA2, Bank Address

Bank Address [1]

0B BA1, Bank Address

Bank Address [0]

0B BA0, Bank Address

Address Bus[13]

Note: A13 is not available for 256 Mbit and x16 512 Mbit configuration

PD

12 w

WR [11:9] w

0B A13, Address bit 13

Active Power-Down Mode Select

0B PD, Fast exit

1B PD, Slow exit

Write Recovery2)

Note: All other bit combinations are illegal.

DLL 8

w

TM

7

w

CL

[6:4] w

001B WR, 2

010B WR, 3

011B WR, 4

100B WR, 5

101B WR, 6

DLL Reset

0B DLL, No

1B DLL, Yes

Test Mode

0B TM, Normal Mode

1B TM, Vendor specific test mode

CAS Latency

Note: All other bit combinations are illegal.

010B CL, 2

011B CL, 3

100B CL, 4

101B CL, 5

110B CL, 6

Internet Data Sheet

16

Rev. 1.05, 2007-01

03292006-YBYM-WG0Z

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