SLRC400 Datasheet, PDF (99/130 Pages) NXP Semiconductors – I·CODE Reader IC

Philips Semiconductors
I•CODE Reader IC
Product Specification Rev. 2.0 November 2001
SL RC400
16.4.1.2 RF-Channel Redundancy and Framing
Each transmitted ISO 15693 frame consists of a SOF (start of frame) pattern, followed by the data stream
and is closed by an EOF (end of frame) pattern. All I•CODE1 command frames consists of a START PULSE
followed by the data stream. The I•CODE1 commands have a fix length and no EOF is needed. These
different phases of the transmit sequence may be monitored by watching ModemState of PrimaryStatus-
Register (see 16.4.4).
Depending on the setting of bit TxCRCEn in the ChannelRedundancy-Register a CRC is calculated and
appended to the data stream. The CRC is calculated according the settings in the ChannelRedundancy
Register.
16.4.1.3 Transmission of Frames with more than 64 Bytes
To generate frames with more than 64 bytes, the µ-Processor has to write data into the FIFO buffer while the
Transmit Command is active. The state machine checks the FIFO status when it starts transmitting the last
bit of the actual data stream (the check time is marked below with arrows).
TxLastBits
TxLastBits = 0
FIFO Length
0x01
0x00
FIFO empty
TxData Bit7 Bit0
Bit7 Bit0
Bit7
Check FIFO empty
Accept Further Data
Figure 16-1: Timing for Transmitting Byte Oriented Frames
As long as the internal signal ‘Accept Further Data’ is 1 further data may be loaded into the FIFO. The
SL RC400 appends this data to the data stream transmitted via the RF-interface.
If the internal signal ‘Accept Further Data’ is 0 the transmission will terminate. All data written into the FIFO
buffer after ‘Accept Further Data’ went 0 will not be transmitted anymore, but remain in the FIFO buffer.
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Preliminary