SLRC400 Datasheet, PDF (28/130 Pages) NXP Semiconductors – I·CODE Reader IC

Philips Semiconductors
I•CODE Reader IC
Product Specification Rev. 2.0 November 2001
SL RC400
5.2.2.3 ErrorFlag Register
Error flags showing the error status of the last executed command.
Name: ErrorFlag
Address: 0x0A
Reset value: 00000000, 0x00
7
0
Access
r
Rights
6
5
4
3
2
1
0
0
AccessErr FIFOOvfl CRCErr FramingErr
0
CollErr
r
r
r
r
r
r
r
Description of the bits
Bit
Symbol
7-6
0
5
AccessErr
4
FIFOOvfl
3
CRCErr
2
FramingErr
1
0
0
CollErr
Function
Reserved for future use.
This bit is set to 1, if the access rights to the E²PROM are violated.
This bit is set to 0 starting an E²PROM related command.
This bit is set to 1, if the µ-Processor or a SL RC400’s internal state machine
(e.g. receiver) tries to write data into the FIFO buffer although the FIFO buffer is
already full.
This bit is set to 1, if RxCRCEn is set and the CRC fails. It is cleared to 0
automatically at receiver start phase during the state PrepareRx.
This bit is set to 1, if the SOF is incorrect. It is cleared automatically at receiver
start (that is during the state PrepareRx).
RFU
This bit is set to 1, if a bit-collision is detected. It is cleared automatically at
receiver start (that is during the state PrepareRx).
28
Preliminary