PDI1394L41 Datasheet, PDF (76/81 Pages) NXP Semiconductors – 1394 content protection AV link layer controller

Philips Semiconductors
1394 content protection AV link layer controller
Preliminary specification
PDI1394L41
16.3 PHY-Link Interface Critical Timings
SCLK
PHY D[0:7], PHY CTL[0:1]
50%
t_SUP
t_HP
50%
t_SCLKPER
50%
Figure 38. PHY D[0:7], PHY CTL[0:1] Input Setup and Hold Timing Waveforms
50%
SV00919
SCLK
PHY D[0:7], PHY CTL[0:1], LREQ
50%
t_DP
50%
SV00694
Figure 39. PHY D[0:7], PHY CTL[0:1], and LREQ Output-Delay Timing Waveforms
2000 Apr 15
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