PDI1394L41 Datasheet, PDF (71/81 Pages) NXP Semiconductors – 1394 content protection AV link layer controller

Philips Semiconductors
1394 content protection AV link layer controller
Preliminary specification
PDI1394L41
13.5.1.2 Asynchronous Receive Request FIFO Size (RREQSIZE) – Indirect Address: 0x104
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
base_fifo
000100
Reset Value 0x00000407
Bit 31..14
R/W Unused bits read ‘0’
Bit 13..8
R/W base_fifo: Base address of the FIFO
Bit 7, 6
R/W Unused bits read ‘0’
Bit 5..0
R/W end_fifo: End address of the FIFO
13.5.1.3 Asynchronous Transmit Response FIFO Size (TRSPSIZE) – Indirect Address: 0x110
end_fifo
000111
SV01767
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
base_fifo
001000
Reset Value 0x0000080B
Bit 31..14
R/W Unused bits read ‘0’
Bit 13..8
R/W base_fifo: Base address of the FIFO
Bit 7, 6
R/W Unused bits read ‘0’
Bit 5..0
R/W end_fifo: End address of the FIFO
13.5.1.4 Asynchronous Transmit Request FIFO Size (TREQSIZE) – Indirect Address: 0x114
end_fifo
001011
SV01768
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset Value 0x00000C0F
Bit 31..14
R/W Unused bits read ‘0’
Bit 13..8
R/W base_fifo: Base address of the FIFO
Bit 7, 6
R/W Unused bits read ‘0’
Bit 5..0
R/W end_fifo: End address of the FIFO
base_fifo
001100
end_fifo
001111
SV01769
2000 Apr 15
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