PDI1394P21 Datasheet, PDF (10/28 Pages) NXP Semiconductors – 3-port physical layer interface

Philips Semiconductors
3-port physical layer interface
Objective specification
PDI1394P21
12.0 OTHER DEVICE I/O
SYMBOL
PARAMETER
I_DD
Supply current
TEST CONDITION
Peak ¹
Transmit ²
Repeat ³
Idle ⁴
MIN
TYP
MAX
UNIT
tbf
mA
tbf
mA
tbf
mA
tbf
mA
I_DD–PD
Supply current in power down or
suspend mode
PD = V_DD in power down mode
tbf
tbf
mA
370 kΩ–400 kΩ resistor between cable
V_TH
Cable power status threshold voltage power and CPS pin: Measured at cable
7.5
8.0
8.5
V
power side of resistor
V_DD >= 2.7 V, I_OH = –4 mA, /ISO = V_DD
2.2
V_OH
High-level output voltage. pins CTLn,
Dn, SYSCLK, CNA, C/LKON
V_DD >= 3.0 V, I_OH = –4 mA, /ISO = V_DD
2.8
Annex J: I_OH = –9 mA, /ISO = 0
V_DD–0.4
V_OL
Low-level output voltage
I_OL = 4 mA, /ISO = V_DD
Annex J: I_OL = 9 mA, /ISO = 0
I_BH+
Positive peak bus holder current
/ISO = V_DD, V_I = 0 V to V_DD
0.08
I_BH–
Negative peak bus holder current
/ISO = V_DD, V_I = 0 V to V_DD
–0.25
I_I
Input current, pins LREQ, LPS, PD,
TEST0, TEST1, PC0–PC2
/ISO = 0 V; V_DD = 3.6 V
V
V
V
0.4
V
0.4
V
0.25
mA
–0.08
mA
5
µA
I_OZ
Off-state current, pins CTLn, Dn,
C/LKON
VO = V_DD or 0 V
–5
5
µA
I_RST-UP
I_RST-DN
V_IT+
Pullup current, /RESET input
Pulldown current, /RESET input
Positive going threshold voltage, LREQ,
CTL0, CTL1, D0–D7, C/LKON inputs ⁵
V_I = 1.5 V, PD = 0
V_I = 0 V, PD = 0
V_I = V_DD, PD = V_DD
/ISO = 0 V
–80
–40
–20
µA
–90
–45
–22
µA
86
260
450
µA
V_DD/2 + 0.3
V_DD/2 + 0.9 V
V_IT–
Negative going threshold voltage, LREQ,
CTL0, CTL1, D0–D7, C/LKON inputs ⁵
/ISO = 0 V
V_DD/2 – 0.9
V_DD/2 – 0.3 V
V_IT+
Positive going threshold voltage, PD,
LPS inputs
/ISO = 0 V. V_LREF = 0.42 x V_DD
V_LREF+1
V
V_IT–
Negative going threshold voltage, PD,
LPS inputs
/ISO = 0 V. V_LREF = 0.42 x V_DD
V_LREF+0.2
V
V_O
TPBIAS output voltage
At rated I_O current
1.665
2.015
V
NOTES:
1. Worst case, all ports transmitting, 100% bandwidth at S400, V_DD = 3.6 V, T_A = 0°C: At T_A = 70°C, the maximum current is tbf mA.
2. All ports transmitting, 100% bandwidth at S400, V_DD = 3.3 V, T_A = 25°C
3. Receiving on port 0 and transmitting on port 1 and port 2. Full ISO payload of 84 µS, S400, data value of CCCCCCCCh, V_DD = 3.3 V, TA = 25°C
4. Receiving cycle starts on port 0 and transmitting cycle starts on port 1 and port 2, V_DD = 3.3 V, TA = 25°C
5. C/LKON is only an input when /RESET = 0
1999 Jul 09
10