NS32FX161-15 Datasheet, PDF (97/102 Pages) National Semiconductor (TI) – Advanced Imaging/Communication Signal Processors

Appendix B Instruction Execution Times (Continued)
TABLE B-1 Basic Instructions (Continued)
Mnemonic
TEA1
TEA2
TOPB
TOPW
TOPD
TOPi
L
REMi
1
1
3
16
RESTORE
n
RET
1
RETI
1
2
2
2
2
3
RETT
2
2
ROTi
1
1
1
2
RXP
1
2
Scondi
1
1
1
1
SAVE
n
SBITi
1
1
2
1
1
1
SBITIi
1
1
2
1
1
1
SETCFG
SKPSi
n
SKPST
n
n
SPRi
1
1
SUBi
1
1
3
1
1
SUBCi
1
1
3
1
1
SUBPi
SVC
TBIti
WAIT
1
1
3
1
1
3
2
4
1
1
1
1
1
1
XORi
1
1
3
1
1
TCY
57 x 62
5 n a 12
2%8
60
60
45
14 x 45
2%6
9
10
4 n a 13
15
7
15
7
15
27 n a 51
30 n a 51
21 x 27
3
4
4
3
4
4
16
18
40
14
4
6x
3
4
4
Notes
n e of general
registers restored
Non-Cascaded
Cascaded
False
True
n e of general
registers saved
k_xMl
k_xRl
k_xMl
k_xRl
n e of elements
not Translated
Translated
k_xMl
k_MRl
k_RRl
k_xMl
k_MRl
k_RRl
no carry
carry
k_xMl
k_xRl
e until an
interrupt reset
k_xMl
k_MRl
k_RRl
97