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NS32FX161-15 Datasheet, PDF (76/102 Pages) National Semiconductor (TI) – Advanced Imaging/Communication Signal Processors
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4 0 Device Specifications (Continued)
4 4 2 Timing Tables (Continued)
4 4 2 1 Output Signals Internal Propagation Delays NS32FX161-15 NS32FX164-20 NS32FX164-25
Symbol Figure
Description
Reference
Conditions
NS32FX161-15
Min Max
NS32FX164-20
Min Max
NS32FX164-25
Units
Min Max
tDDINv
tDDINh
4-4 DDIN Signal Valid
4-4 DDIN Signal Hold
After R E CTTL T1
After R E CTTL
Next T1 or Ti
14
13
12 ns
0
0
0
ns
tDDINf
4-7 DDIN Floating
After R E CTTL Ti
14
13
12 ns
tSPCa
4-10 SPC Output Active
After R E CTTL T1
14
13
12 ns
tSPCia
4-10 SPC Output Inactive
After R E CTTL T4
14
13
12 ns
tHLDAa 4-7 HLDA Signal Active
After R E CTTL Ti
14
13
12 ns
tHLDAia 4-8 HLDA Signal Inactive After R E CTTL Ti
14
13
12 ns
tSTv
4-4 Status ST0–ST3 Valid After R E CTTL T4
14
13
12 ns
(Before T1 see Note 1)
tSTh
4-4 Status ST0–ST3 Hold After R E CTTL T4
0
0
0
ns
tBPUv
4-4 BPU Signal Valid
After R E CTTL T4 or Ti
14
13
12 ns
tBPUh
4-4 BPU Signal Hold
After R E CTTL T4 or Ti 0
0
0
ns
tTSOa
4-4 TSO Signal Active
After R E CTTL T2
14
13
12 ns
tTSOia
4-4 TSO Signal Inactive
After R E CTTL T4
14
13
12 ns
tRDa
4-4 RD Signal Active
After R E CTTL T2
14
13
12 ns
tRDia
4-4 RD Signal Inactive
After R E CTTL T4
14
13
12 ns
tWRa
4-5 WR Signal Active
After R E CTTL T2
14
13
12 ns
tWRia
4-5 WR Signal Inactive
After R E CTTL T4
14
13
12 ns
tDBEa(R) 4-4 DBE Active (Read Cycle) After R E CTTL T2
(Note 4)
0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp
b6 ns a16 ns b6 ns a15 ns b6 ns a14 ns
tDBEa(W) 4-5 DBE Active (Write Cycle) After R E CTTL T2
tDBEia 4-5 4-6 DBE Inactive
(Note 4)
After R E CTTL T4
14
13
12 ns
0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp
b6 ns a16 ns b6 ns a15 ns b6 ns a14 ns
tUSv
tUSh
tPFSa
4-4 U S Signal Valid
4-4 U S Signal Hold
4-13 PFS Signal Active
(Note 4)
After R E CTTL T4
After R E CTTL T4
After R E CTTL
14
13
12 ns
0
0
0
ns
0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp
b6 ns a16 ns b6 ns a15 ns b6 ns a14 ns
tPFSia
4-13 PFS Signal Inactive
(Note 4)
After R E CTTL
0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp
b6 ns a16 ns b6 ns a15 ns b3 ns a14 ns
tALEa
4-5 ALE Signal Active
(Note 4)
After R E CTTL T4
0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp
b6 ns a16 ns b6 ns a15 ns b6 ns a14 ns
tALEia
4-5 ALE Signal Inactive
(Note 4)
After R E CTTL T1
0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp 0 5 tCTp
b6 ns a16 ns b6 ns a15 ns b6 ns a14 ns
TALALEs 4-5 AD0 – AD15 Setup
Before ALE T E
10
10
10
ns
76
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